search for: 496r

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2017 Apr 24
3
Debugging UNREACHABLE "Couldn't join subrange" in RegisterCoalescer (out-of-tree backend)
...g, with debugging turned on: $llc bugpoint.reduced.simplified.bc -debug ... 208B %vreg13:sub_64_1<def> = COPY %vreg34:sub_64_1; VecRegs:%vreg13,%vreg34 Considering merging to VecRegs with %vreg34 in %vreg13 RHS = %vreg34 [160r,240r:0)[240r,384B:1)[400B,480r:1)[480r,496r:2)[496r,672r:3) 0 at 160r 1 at 240r 2 at 480r 3 at 496r L00000020 [240r,384B:1)[400B,672r:1) 0 at x 1 at 240r L00000010 [160r,384B:1)[400B,672r:1) 0 at x 1 at 160r L00000002 [480r,480d:1)[496r,672r:0) 0 at 496r 1 at 480r L00000001 [480r,672r:0) 0 at 480r LHS = %vreg13 [96r,112r...
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...+[400r,448B:0) phi-join +[448B,464r:1) 416B%vreg48<def> = COPY %vreg3<kill>; R600_Reg128:%vreg48,%vreg3 register: %vreg48 +[416r,448B:0) phi-join +[448B,480r:1) 432B%vreg49<def> = COPY %vreg13<kill>; R600_Reg32:%vreg49,%vreg13 register: %vreg49 +[432r,448B:0) phi-join +[448B,496r:1) BB#1:# derived fromĀ  464B%vreg5<def> = COPY %vreg47<kill>; R600_Reg32:%vreg5,%vreg47 register: %vreg5 +[464r,592B:0) +[880B,992r:0) 480B%vreg6<def> = COPY %vreg48<kill>; R600_Reg128:%vreg6,%vreg48 register: %vreg6 +[480r,592B:0) +[592B,704r:0) +[880B,1056r:0) 496B%vreg7&l...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...oin +[448B,464r:1) > 416B%vreg48<def> = COPY %vreg3<kill>; R600_Reg128:%vreg48,%vreg3 > register: %vreg48 +[416r,448B:0) phi-join +[448B,480r:1) > 432B%vreg49<def> = COPY %vreg13<kill>; R600_Reg32:%vreg49,%vreg13 > register: %vreg49 +[432r,448B:0) phi-join +[448B,496r:1) > BB#1:# derived fromĀ  > 464B%vreg5<def> = COPY %vreg47<kill>; R600_Reg32:%vreg5,%vreg47 > register: %vreg5 +[464r,592B:0) +[880B,992r:0) > 480B%vreg6<def> = COPY %vreg48<kill>; R600_Reg128:%vreg6,%vreg48 > register: %vreg6 +[480r,592B:0) +[592B,704r:0) +[8...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
Hi Vincent, On 24/10/2012 23:26, Vincent Lejeune wrote: > Hi, > > I don't know if my llvm ir code is faulty, or if I spot a bug in the RegisterCoalescing Pass, so I'm posting my issue on the ML. Shader and print-before-all dump are given below. > > The interessing part is the vreg6/vreg48 reduction : before RegCoalescing, the machine code is : > > // BEFORE LOOP >
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
Hi, I don't know if my llvm ir code is faulty, or if I spot a bug in the RegisterCoalescing Pass, so I'm posting my issue on the ML. Shader and print-before-all dump are given below. The interessing part is the vreg6/vreg48 reduction : before RegCoalescing, the machine code is : // BEFORE LOOP ... Some COPYs.... 400B%vreg47<def> = COPY %vreg2<kill>; R600_Reg32:%vreg47,%vreg2