Displaying 8 results from an estimated 8 matches for "496b".
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496
2016 Jan 25
0
Why is my rsync transfer slow?
...own name and icon. Internally it's a folder tree with a number of files/folders.
> As a quick test, I've just created a 100M sparse image, here's the contents before I've added any files :
>> $ ls -lRh a.sparsebundle/
>> total 16
>> -rw-r--r-- 1 simon staff 496B 25 Jan 14:36 Info.bckup
>> -rw-r--r-- 1 simon staff 496B 25 Jan 14:36 Info.plist
>> drwxr-xr-x 8 simon staff 272B 25 Jan 14:36 bands
>> -rw-r--r-- 1 simon staff 0B 25 Jan 14:36 token
>>
>> a.sparsebundle//bands:
>> total 34952
>> -rw-r--r-- 1...
2016 Jan 25
3
Why is my rsync transfer slow?
...ile with it's own name and icon. Internally it's a folder tree with a number of files/folders.
As a quick test, I've just created a 100M sparse image, here's the contents before I've added any files :
> $ ls -lRh a.sparsebundle/
> total 16
> -rw-r--r-- 1 simon staff 496B 25 Jan 14:36 Info.bckup
> -rw-r--r-- 1 simon staff 496B 25 Jan 14:36 Info.plist
> drwxr-xr-x 8 simon staff 272B 25 Jan 14:36 bands
> -rw-r--r-- 1 simon staff 0B 25 Jan 14:36 token
>
> a.sparsebundle//bands:
> total 34952
> -rw-r--r-- 1 simon staff 2.1M 25 Jan...
2016 Jan 24
3
Why is my rsync transfer slow?
On Sun, Jan 24, 2016 at 12:29 PM, <
dbonde+forum+rsync.lists.samba.org at gmail.com> wrote:
> On 2016-01-24 03:51, Kevin Korb wrote:
>
>> Are you rsyncing from one to the other? Both of them to somewhere
>> else? One at a time to somewhere else? Why won't you just show your
>> actual command line and an ls -li of the correct source and incorrect
>>
2012 Oct 25
2
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...+[448B,496r:1)
BB#1:# derived from
464B%vreg5<def> = COPY %vreg47<kill>; R600_Reg32:%vreg5,%vreg47
register: %vreg5 +[464r,592B:0) +[880B,992r:0)
480B%vreg6<def> = COPY %vreg48<kill>; R600_Reg128:%vreg6,%vreg48
register: %vreg6 +[480r,592B:0) +[592B,704r:0) +[880B,1056r:0)
496B%vreg7<def> = COPY %vreg49<kill>; R600_Reg32:%vreg7,%vreg49
register: %vreg7 +[496r,592B:0) +[880B,1088r:0)
512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
register: %vreg29 +[512r,528r:0)
5...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...rived from
> 464B%vreg5<def> = COPY %vreg47<kill>; R600_Reg32:%vreg5,%vreg47
> register: %vreg5 +[464r,592B:0) +[880B,992r:0)
> 480B%vreg6<def> = COPY %vreg48<kill>; R600_Reg128:%vreg6,%vreg48
> register: %vreg6 +[480r,592B:0) +[592B,704r:0) +[880B,1056r:0)
> 496B%vreg7<def> = COPY %vreg49<kill>; R600_Reg32:%vreg7,%vreg49
> register: %vreg7 +[496r,592B:0) +[880B,1088r:0)
> 512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0,
> 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
> register: %vr...
2012 Sep 18
2
[LLVMdev] liveness assertion problem in llc
...480B CALL <ga:@CGA_kernel_advance>, 0, 0, pred:%noreg, 0, %noreg, %P0<imp-def>, %P1<imp-def>, %P2<imp-def>, %P3<imp-def>, %P15<imp-def>, %RT<imp-def>, %P0<imp-use>, %P1<imp-use>, %P2<imp-use>, %P3<imp-use>; dbg:../src/getbits.c:57:5
496B ADJCALLSTACKUP 0, 0, pred:%noreg, %SP<imp-def>, %SP<imp-use>
512B %vreg16<def> = LDUBri %vreg8, 1, pred:%noreg; mem:LD1[getelementptr inbounds (%struct.FIFO* @fifo, i32 0, i32 1)] IntRegs:%vreg16,%vreg8 dbg:../src/getbits.c:53:3
544B %vreg17<def,tied1> = CMPEQANDri %vreg1...
2012 Oct 25
0
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...= COPY %vreg13<kill>; R600_Reg32:%vreg49,%vreg13
> Successors according to CFG: BB#1
>
>
> // LOOP CONDITION
> 464B%vreg5<def> = COPY %vreg47<kill>; R600_Reg32:%vreg5,%vreg47
> 480B%vreg6<def> = COPY %vreg48<kill>; R600_Reg128:%vreg6,%vreg48
> 496B%vreg7<def> = COPY %vreg49<kill>; R600_Reg32:%vreg7,%vreg49
> 512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
> 528B%vreg30<def> = COPY %vreg29<kill>; R600_Reg32:%vreg30,%v...
2012 Oct 24
3
[LLVMdev] RegisterCoalescing Pass seems to ignore part of CFG.
...g48,%vreg3
432B%vreg49<def> = COPY %vreg13<kill>; R600_Reg32:%vreg49,%vreg13
Successors according to CFG: BB#1
// LOOP CONDITION
464B%vreg5<def> = COPY %vreg47<kill>; R600_Reg32:%vreg5,%vreg47
480B%vreg6<def> = COPY %vreg48<kill>; R600_Reg128:%vreg6,%vreg48
496B%vreg7<def> = COPY %vreg49<kill>; R600_Reg32:%vreg7,%vreg49
512B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg29,%vreg0,%vreg7
528B%vreg30<def> = COPY %vreg29<kill>; R600_Reg32:%vreg30,%vreg29
544B...