Displaying 1 result from an estimated 1 matches for "48f4f297".
2018 Jun 21
2
add new instruction format
Hi
Im trying to add RISC V Store Instruction for an Experiment on my Target.
The thing is, llvm Store Format gets Register and Pointer Type Operand.
beside this, RISC-V Store Instruction takes source Register, Base Register and offset immediate type. So this takes 3 leafs.
In this case, should I make new SelectionDAG Node in this case? or use BuildMI Instruction to add new Register?
P.S.