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2013 Jun 19
0
[LLVMdev] Vector type LOAD/STORE with post-increment.
On 19 June 2013 11:32, Francois Pichet <pichet2000 at gmail.com> wrote:
> I am talking about something like this:
> vldr d16, [sp, #8]
>
Hi Francois,
This is just using the offset, not updating the register (see ARM ARM
A8.5). Post-increment only has meaning if you write-back the new value to
the register like:
vldr d16, [sp], #8
Did you mean write-back? or just
2013 Jun 19
3
[LLVMdev] Vector type LOAD/STORE with post-increment.
I am trying to implement vector type load/store with post-increment for an
out of tree backend.
I see that that ARM NEON support such load/store so I am using ARM NEON as
an example of what to do.
The problem is I can't get any C or C++ code example to actually generate
vector load/store with post increment.
I am talking about something like this:
vldr d16, [sp, #8]
Does anybody