search for: 460800

Displaying 6 results from an estimated 6 matches for "460800".

Did you mean: 40800
2006 Aug 08
1
GSM back door to shell with Centos and Palm handhelds
...ntifier: ATI -- 144 ttyACM0*1>: Speed 4800: AT -- OK ttyACM0*1>: Speed 9600: AT -- OK ttyACM0*1>: Speed 19200: AT -- OK ttyACM0*1>: Speed 38400: AT -- OK ttyACM0*1>: Speed 57600: AT -- OK ttyACM0*1>: Speed 115200: AT -- OK ttyACM0*1>: Speed 230400: AT -- OK ttyACM0*1>: Speed 460800: AT -- OK ttyACM0*1>: Max speed is 460800; that should be safe. ttyACM0*1>: ATQ0 V1 E1 S0=0 &C1 &D2 +FCLASS=0 -- OK ttyUSB0*1>: ATQ0 V1 E1 -- failed with 2400 baud, next try: 9600 baud ttyUSB0*1>: ATQ0 V1 E1 -- failed with 9600 baud, next try: 115200 baud ttyUSB0*1>: ATQ0 V1...
2006 Jan 04
0
Asterisk Dial problem
Hello there, I think there is a problem related to Asterisk's Dial 'r' option. When we use the 'r' option in the cmd Dial, Asterisk is supposed to generate its own rings until an answer is received from the called party. Unfortunately when I make a SIP call to another PBX without using the 'r' option (expecting to hear the rings from the other PBX), I
2016 Apr 18
8
[Bug 2565] New: High baud rate gets sent, solaris closes pty
https://bugzilla.mindrot.org/show_bug.cgi?id=2565 Bug ID: 2565 Summary: High baud rate gets sent, solaris closes pty Product: Portable OpenSSH Version: 7.1p2 Hardware: Sparc OS: Solaris Status: NEW Severity: minor Priority: P5 Component: sshd Assignee: unassigned-bugs at
2005 Mar 23
2
pauses sync'ing between tmpfs and disk on Linux 2.4.x
I've set up a 1GB tmpfs filesystem on a system with a single IDE disk and 2GB's of memory. I'm storing a large amount of RRD files (~300MB) on the tmpfs filesystem to make their generation a bit speedier... this part works great. However, I want to rsync these files over from time to time to a directory on the local filesystem (same physical server). I'm using rsync 2.6.4pre3
2016 Mar 11
16
[PATCH 00/16] clk/gm20b: add basic driver
This series does some refactoring in the GK20A's volt and clk drivers (fixing a few things while we are at it) to let GM20B benefit from the GK20A's logic with which it is compatible. GM20B is capable of more sophisticated (and power-efficient) reclocking which will follow later. Even after this more fancy reclocking is merged, the present logic will remain used in the lowest speedo of
2016 Jun 01
15
[PATCH 00/15] clk/tegra: improve code and add DFS support
This series adds support for GM20B PLL's Maxwell features, namely glitchless switch and (more importantly) DFS support. DFS lets the PLL lower its output speed according to input current variations, making the clock more stable and allowing it to run safely at lower voltage. All GM20B additions are done in the last patch, which consequently ends up being considerably big ; fortunately, it