Displaying 20 results from an estimated 97 matches for "4555".
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0555
2013 Jan 28
0
add x64 printer drivers with cupsaddsmb fail
...ne cycle):
/[root at newcups]# cupsaddsmb -H localhost -U root -h localhost -a -v
Un mot de passe pour root est n?cessaire pour acc?der ? localhost via
SAMBA :
Commande en cours d'ex?cution : smbclient //localhost/print$ -N -A
/tmp/cupsjenHRl -c ? mkdir W32X86;put /tmp/cups4nnHkk
W32X86/4-4555-couleur.ppd;put /usr/share/cups/drivers/ps5ui.dll
W32X86/ps5ui.dll;put /usr/share/cups/drivers/pscript.hlp
W32X86/pscript.hlp;put /usr/share/cups/drivers/pscript.ntf
W32X86/pscript.ntf;put /usr/share/cups/drivers/pscript5.dll
W32X86/pscript5.dll ?
Domain=[MYGROUP] OS=[Unix] Server=[Samba 3.5.10...
2008 Nov 18
3
[LLVMdev] 32 bit boolean results
Is there a way to tell LLVM to treat Boolean results as 32bit values
instead of 1 bit values?
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 10
3
[LLVMdev] Determining the names of all the functions in a module
...e looked in the
header files
but I cannot determine how to extract the function name from either a
Function object
or a Module.
Any tips or ideas would be greatly appreciated.
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 23
2
[LLVMdev] Determining the register type of a MachineOperand
How do I determine what type of register(i.e. i32, f32, etc..) I am
accessing from a MachineOperand? I.e. how do I get to the MVT struct, or
equivalent information, from a MachineOperand object?
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 25
2
[LLVMdev] Going from argument to register and back
...ll be correct 100% of the time
with the current set of assumptions,
but I would rather determine it dynamically so that I can change my
assumptions and still get the right results.
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Oct 20
2
[LLVMdev] Virtual Register allocation across functions
...location information
be saved across functions so that if I create a new virtual register in
a function that it doesn't use a virtual register allocated in any
previous function?
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Oct 24
2
[LLVMdev] SetCC tablegen pattern
...electionDAG.td? Also, why is
it assumed that all comparison results are always integers?
If I put GPRI32 as my destination register, it complains about register
classes not matching......
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Nov 18
0
[LLVMdev] 32 bit boolean results
...as 32bit values
> instead of 1 bit values?
LLVM IR doesn't have a concept of C level booleans. What problem are
you trying to solve?
-Chris
>
> Thanks,
>
> Micah Villmow
> Systems Engineer
> Advanced Technology & Performance
> Advanced Micro Devices Inc.
> 4555 Great America Pkwy,
> Santa Clara, CA. 95054
> P: 408-572-6219
> F: 408-572-6596
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
-...
2001 Mar 19
3
3D plots
...-------------------------------------------
Fredrik Karlsson, Research Student
Department of Philosophy and Linguistics
Ume? University
S-901 87 UME?
SWEDEN
Tel: +46 90 786 56 84 Web: http://www.ling.umu.se/~fredrik/
Fax: +46 90 786 63 77 Email: fredrik at ling.umu.se
PGP-fingerprint:2DD5 54A1 4555 6D00 F386 C269 C430 0C0F 1A53 49B9
-----------------------------------------------------------------
-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-
r-help mailing list -- Read http://www.ci.tuwien.ac.at/~hornik/R/R-FAQ.html
Send "info", "help",...
2008 Oct 14
3
[LLVMdev] CFG modifcations and code gen
...>succ_begin(),
newExitPath, false);
newExitPath->moveAfter(pHigh);
root->getParent()->RenumberBlocks();
So what am I doing wrong?
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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A...
2008 Sep 15
3
[LLVMdev] Bad legalization?
...ntry:
%call = tail call i32 (...)* @abs( i32 %x ) ; <i32>
[#uses=1]
store i32 %call, i32 addrspace(11)* %result
ret void
}
declare i32 @abs(...)
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Oct 22
2
[LLVMdev] Register class conversions
...ds the larger type and not the
smaller type.
So is it possible to have the register class I have setup for i32 type
be automatically converted to the generic register type instead of
aborting?
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 17
2
[LLVMdev] store addrspace qualifier
...d
Register(%result I'm guessing)
Operand 3 is undef
So, how do I find out the address space? The reason being different
address spaces are accessed with different registers.
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Oct 28
4
[LLVMdev] Using patterns inside patterns
Is there currently a way to use a pattern inside of another pattern?
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Oct 14
0
[LLVMdev] CFG modifcations and code gen
...newExitPath->moveAfter(pHigh);
> root->getParent()->RenumberBlocks();
>
> So what am I doing wrong?
>
> Thanks,
>
>
> Micah Villmow
> Systems Engineer
> Advanced Technology & Performance
> Advanced Micro Devices Inc.
> 4555 Great America Pkwy,
> Santa Clara, CA. 95054
> P: 408-572-6219
> F: 408-572-6596
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
-...
2013 Apr 05
3
Fwd: rsync 3.0.9 partial file left after CTRL-C WITHOUT using --partial
...oot root 4096 Jul 24 2011 .
4 drwxr-xr-x 25 root root 4096 Jul 24 2011 ..
12 -rw-r--r-- 1 root root 8618 Nov 15 2010 binary_heap_.hpp
8 -rw-r--r-- 1 root root 4373 Nov 15 2010 const_iterator.hpp
8 -rw-r--r-- 1 root root 4458 Nov 15 2010 const_point_iterator.hpp
8 -rw-r--r-- 1 root root 4555 Nov 15 2010
constructors_destructor_fn_imps.hpp
4 -rw-r--r-- 1 root root 2509 Nov 15 2010 debug_fn_imps.hpp
4 -rw-r--r-- 1 root root 2636 Nov 15 2010 entry_cmp.hpp
4 -rw-r--r-- 1 root root 2599 Nov 15 2010 entry_pred.hpp
8 -rw-r--r-- 1 root root 5837 Nov 15 2010 erase_fn_imps.hpp
4 -r...
2008 Sep 22
1
[LLVMdev] Tablegen address space
Is there a known way to get pattern matching on the address space from
tablegen?
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 23
1
[LLVMdev] Tablegen strings
...t to attempt to match against src0_neg
instead of just src0. Where
can I find the rules for the string pattern matcher so that I can added
arbitrary strings into my
definition.
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 24
0
[LLVMdev] Determining the register type of a MachineOperand
...ster(i.e. i32, f32, etc..) I am
> accessing from a MachineOperand? I.e. how do I get to the MVT
> struct, or equivalent information, from a MachineOperand object?
>
> Micah Villmow
> Systems Engineer
> Advanced Technology & Performance
> Advanced Micro Devices Inc.
> 4555 Great America Pkwy,
> Santa Clara, CA. 95054
> P: 408-572-6219
> F: 408-572-6596
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
-...
2008 Oct 23
1
[LLVMdev] Tablegen and data type support
Is there a way for tablegen to generate patterns for all the data types
of a specific register class instead of just the first one?
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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