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I don't know enough about LLVM CodeGen to answer your questions. I'm just curious. What is the intended level of support for these intrinsics? Are they for reading ALU flags like CF, OF, etc, or for seldom changed control flags like TF and AC? Even DF is typically scratch, and could be used for an -Oz memmove lowering for example. I don't think LLVM will ever really support

Hello all, I am trying to implement intrinsics __readeflags and __writeeflags reading and writing EFLAGS register on x86. These intrinsics expand to two instructions popf and push to register for __readeflags and pushf and pop to register for __writeeflags. These instructions are not connected explicitly so I can't use patterns in .td file to match intrinsics. I tried to implement custom