Displaying 3 results from an estimated 3 matches for "4065e1fc".
2008 Apr 27
1
[LLVMdev] Questions for new Backend
...;t have any 8/16
> bit arch's and nothing that uses ASI's in mainline yet. It would be
> great to have an example.
--
Christopher Lamb
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2008 Apr 27
0
[LLVMdev] Questions for new Backend
On Apr 27, 2008, at 7:37 AM, Cédric Venet wrote:
> Hi,
>
> I am trying to do a backend to a very simple microcontroller. I have
> some
> questions.
Ok.
> 1) I have instruction which do "r1 <- r1 op r2", from what I have
> ssen I
> must declare them like:
>
> let isTwoAddress = 1 in
> def ADD : FopRR< 0b01010,
> (outs
2008 Apr 27
2
[LLVMdev] Questions for new Backend
Hi,
I am trying to do a backend to a very simple microcontroller. I have some
questions.
1) I have instruction which do "r1 <- r1 op r2", from what I have ssen I
must declare them like:
let isTwoAddress = 1 in
def ADD : FopRR< 0b01010,
(outs CPURegs:$sX), (ins CPURegs:$isX, CPURegs:$sY),
"ADD $sX, $sY"),
[(set