Displaying 5 results from an estimated 5 matches for "400c15".
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400515
2016 Jun 22
3
x86: How to Force 2-byte `jmp` instruction in lowering
...getting a "jmpq <address>" with
this incantation when I load and disassemble from gdb. I'm seeing a
5-instruction jump, followed by the nops.
If I disassemble with llvm-objdump though I see the following:
_Z3foov:
400c10: e9 09 00 00 00 jmp 9 <_Z3foov+0xE>
400c15: 66 0f 1f 84 00 00 02 00 00 nopw 512(%rax,%rax)
I'm not sure whether the extra 0's after '0xe9 0x09' are alignment padding
(though I was expecing 0x90 to show up if this was an alignment issue).
Is there anything else I can try here?
Thanks in advance!
-------------...
2016 Jun 22
0
x86: How to Force 2-byte `jmp` instruction in lowering
...uot; with
> this incantation when I load and disassemble from gdb. I'm seeing a
> 5-instruction jump, followed by the nops.
>
> If I disassemble with llvm-objdump though I see the following:
>
> _Z3foov:
> 400c10: e9 09 00 00 00 jmp 9 <_Z3foov+0xE>
> 400c15: 66 0f 1f 84 00 00 02 00 00 nopw 512(%rax,%rax)
>
> I'm not sure whether the extra 0's after '0xe9 0x09' are alignment padding
> (though I was expecing 0x90 to show up if this was an alignment issue).
>
> Is there anything else I can try here?
>
>...
2016 Jun 22
2
x86: How to Force 2-byte `jmp` instruction in lowering
I have a bit of a riddle:
In http://reviews.llvm.org/D19904 I'm trying to spell the following
assembly:
.palign 2, 0x90
jmp +0x9
nopw 512(%rax,%rax,1)
// rest of the code
I try the following snippet to accomplish this:
OutStreamer->EmitLabel(CurSled);
OutStreamer->EmitCodeAlignment(4);
auto Target = OutContext.createLinkerPrivateTempSymbol();
// Use a two-byte `jmp`.
2016 Jun 22
2
x86: How to Force 2-byte `jmp` instruction in lowering
...ion when I load and disassemble from gdb. I'm seeing a
>> 5-instruction jump, followed by the nops.
>>
>> If I disassemble with llvm-objdump though I see the following:
>>
>> _Z3foov:
>> 400c10: e9 09 00 00 00 jmp 9 <_Z3foov+0xE>
>> 400c15: 66 0f 1f 84 00 00 02 00 00 nopw 512(%rax,%rax)
>>
>> I'm not sure whether the extra 0's after '0xe9 0x09' are alignment
>> padding (though I was expecing 0x90 to show up if this was an alignment
>> issue).
>>
>> Is there anything el...
2016 Jun 22
0
x86: How to Force 2-byte `jmp` instruction in lowering
...ble from gdb. I'm seeing a
>>> 5-instruction jump, followed by the nops.
>>>
>>> If I disassemble with llvm-objdump though I see the following:
>>>
>>> _Z3foov:
>>> 400c10: e9 09 00 00 00 jmp 9 <_Z3foov+0xE>
>>> 400c15: 66 0f 1f 84 00 00 02 00 00 nopw 512(%rax,%rax)
>>>
>>> I'm not sure whether the extra 0's after '0xe9 0x09' are alignment
>>> padding (though I was expecing 0x90 to show up if this was an alignment
>>> issue).
>>>
>>&...