Displaying 1 result from an estimated 1 matches for "3dff2ae8".
2017 May 15
2
Disabling DAGCombine's specific optimization
Hello LLVM Developers,
I am working on an architecture which have one bit shift operation if
barrel shiftier hardware is not present in such cases some DAGCombine
optimizations reduces performance of certain benchmarks upto 5% for example
consider follwing optimization:
fold (select_cc seteq (and x, y), 0, 0, A) -> (and (shr (shl x)) A)
Here it introduce 2 shift operations and when barrel