search for: 3cb8549cd4e5

...PR3 method provided, it's probably safe to say that the port is *intended* to be suspended. So you may want to consider amending pci_bridge_d3_possible() to allow D3 for such ports regardless of the BIOS date, as I've done for Thunderbolt in this commit: https://github.com/l1k/linux/commit/3cb8549cd4e5 Not sure how to uniquely identify such ports though. Perhaps check if there's a device in slot 0 below the port which has (pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY && (pdev->vendor == PCI_VENDOR_ID_NVIDIA || pdev->vendor == PCI_VENDOR_ID_ATI) Best regards, Luka...

...39;s probably safe to say that the port is *intended* to be suspended. > > So you may want to consider amending pci_bridge_d3_possible() to > allow D3 for such ports regardless of the BIOS date, as I've done > for Thunderbolt in this commit: > https://github.com/l1k/linux/commit/3cb8549cd4e5 Then we have heuristics based on BIOS year, on whether it is TB or not, and next to it whether it is an Optimus laptop? Maybe the PCI core needs to export a function that allows drivers to override the detection if this becomes more common. > Not sure how to uniquely identify such ports though...

On Mon, May 30, 2016 at 02:20:10PM +0200, Peter Wu wrote: > On Mon, May 30, 2016 at 12:57:09PM +0300, Mika Westerberg wrote: > > +Rafael > > > > On Fri, May 27, 2016 at 01:10:37PM +0200, Peter Wu wrote: > > > On Wed, May 25, 2016 at 04:55:35PM +0300, Mika Westerberg wrote: > > > > On Wed, May 25, 2016 at 12:53:01AM +0200, Peter Wu wrote: > > >