Displaying 1 result from an estimated 1 matches for "3ba3fba9".
2014 Aug 22
5
[LLVMdev] Pseudo load and store instructions for AArch64
Hi Renato,
> > I'm trying to add pseudo 64-bit load and store instructions for AArch64, which
> > should have latencies set to "1" while being otherwise exactly the same as
> > normal load and store instructions.
>
> Can I ask why would you need that?
This is the only way I found to stop Machine Instruction Scheduler from
reordering load and store