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...uct list_head imgs; + struct ls_ucode_img *img, *t; + int managed_count = 0; + u32 image_wpr_size; int falcon_id; int ret; - ls_ucode_mgr_init(&mgr); + INIT_LIST_HEAD(&imgs); /* Load all LS blobs */ for_each_set_bit(falcon_id, &managed_falcons, NVKM_FALCON_END) { @@ -417,48 +389,52 @@ acr_r352_prepare_ls_blob(struct acr_r352 *acr, u64 wpr_addr, u32 wpr_size, ret = PTR_ERR(img); goto cleanup; } - ls_ucode_mgr_add_img(&mgr, img); + list_add_tail(&img->node, &imgs); + managed_count++; } /* * Fill the WPR and LSF headers with the right off...

Sending things in a smaller chunks since it makes their reviewing easier. This part part 2/3 of the secboot refactoring/PMU command support patch series. Part 1 was the new falcon library which should be merged soon now. This series is mainly a refactoring/sanitization of the existing secure boot code. It does not add new features (part 3 will). Secure boot handling is now separated by NVIDIA

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the