search for: 384b

...9;s the tail-end of the log, with debugging turned on: $llc bugpoint.reduced.simplified.bc -debug ... 208B %vreg13:sub_64_1<def> = COPY %vreg34:sub_64_1; VecRegs:%vreg13,%vreg34 Considering merging to VecRegs with %vreg34 in %vreg13 RHS = %vreg34 [160r,240r:0)[240r,384B:1)[400B,480r:1)[480r,496r:2)[496r,672r:3) 0 at 160r 1 at 240r 2 at 480r 3 at 496r L00000020 [240r,384B:1)[400B,672r:1) 0 at x 1 at 240r L00000010 [160r,384B:1)[400B,672r:1) 0 at x 1 at 160r L00000002 [480r,480d:1)[496r,672r:0) 0 at 496r 1 at 480r L00000001 [480r,672r:0) 0 at 480r...

...ocation !51; phi.ll:23:1 > RETQ implicit killed $eax, debug-location !51; phi.ll:23:1 > ____________________________________________________ > Go on, After Simple Register Coalescing > > 336B bb.3.vaarg.end: > ; predecessors: %bb.2, %bb.1 > > 384B %17:gr32 = ADD32rr %17:gr32(tied-def 0), %18:gr32, implicit-def dead $eflags, debug-location !41; phi.ll:12:1 > DBG_VALUE %18:gr32, $noreg, !"15", !DIExpression(), debug-location !50; phi.ll:21:1 line no:21 // Seems still works her...

...b, def %5; FPUaOffsetClass:%5 352B %6:fpuaroutaddregisterclass = LOR_A_oo killed %5, implicit-def %rflaga; FPUaROUTADDRegisterClass:%6 FPUaOffsetClass:%5 368B %6:fpuaroutaddregisterclass = HOR_A_oo killed %5, implicit-def %rflaga; FPUaROUTADDRegisterClass:%6 FPUaOffsetClass:%5 384B %7:fpuaoffsetclass = COPY %6; FPUaOffsetClass:%7 FPUaROUTADDRegisterClass:%6 400B MOV_A_or killed %7, @c1; FPUaOffsetClass:%7 416B MOV_A_ro @c1, def %8; FPUaOffsetClass:%8 Result: an assertion is raised... !! ********** PROCESS IMPLICIT DEFS ********** **********...

...ists... Done Building Dependency Tree... Done Correcting dependencies... Done The following extra packages will be installed: librsvg2 The following packages will be upgraded librsvg2 1 upgraded, 0 newly installed, 0 removed and 0 not upgraded. Need to get 0B/82.5kB of archives. After unpacking 384B disk space will be freed. Do you want to continue? [Y/n] y Committing changes... Preparing... ########################################### [100%] 1:librsvg2 ########################################### [100%] /var/tmp/rpm-tmp.76818: line 2: gdk-pixbuf-query-loaders:...

.... -- with kind regards (mit freundlichem Grinsen), Ruediger Oertel (ro@novell.com,ro@suse.de,bugfinder@t-online.de) ---------------------------------------------------------------------- Linux Fatou 2.6.25-rc8-12-default #1 SMP 2008-04-02 01:36:51 +0200 x86_64 Key fingerprint = 17DC 6553 86A7 384B 53C5 CA5C 3CE4 F2E7 23F2 B417 SUSE LINUX Products GmbH, GF: Markus Rex, HRB 16746 (AG N?rnberg)

.... -- with kind regards (mit freundlichem Grinsen), Ruediger Oertel (ro@novell.com,ro@suse.de,bugfinder@t-online.de) ---------------------------------------------------------------------- Linux Fatou 2.6.25-rc8-12-default #1 SMP 2008-04-02 01:36:51 +0200 x86_64 Key fingerprint = 17DC 6553 86A7 384B 53C5 CA5C 3CE4 F2E7 23F2 B417 SUSE LINUX Products GmbH, GF: Markus Rex, HRB 16746 (AG N?rnberg)

After upgrade from previous version I can't run rsync. 2004/05/09 10:40:54 [18630] rsyncd version 2.6.2 starting, listening on port 873 2004/05/09 10:40:54 [18630] rsync error: error in socket IO (code 10) at socket.c(466) strace shows that there is problem with listen() I've found patch on this lists: --- rsync-2.6.2/socket.c.orig 2004-05-08 23:25:11.979473336 +0200 +++

...ords. -- John D. "Trix" Farrar __\\|//__ Basement.NET trix@basement.net (` o-o '') http://www.basement.net/ -----------------------------------ooO-(_)-Ooo-------------------------- GPG Key Fprint: 525F DBA7 1A62 E4C4 E642 DF95 384B B851 3CEF C10A

If I'm understanding what's going on in this test correctly, what's happening is: * ARMTargetLowering::LowerCall prefers indirect calls when a function is called at least 3 times in minsize * In thumb 1 (without -fno-omit-frame-pointer) we have effectively only 3 callee-saved registers (r4-r6) * The function has three arguments, so those three plus the register we need to hold the

...$s22 $s23 $s24 $s25 $s26 $s27 and 35 more...>, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit-def $sp 352B ADJCALLSTACKUP 0, 0, 14, $noreg, implicit-def dead $sp, implicit $sp 368B ADJCALLSTACKDOWN 0, 0, 14, $noreg, implicit-def dead $sp, implicit $sp 384B $r0 = COPY %1:tgpr 400B $r1 = COPY %1:tgpr 416B $r2 = COPY %0:tgpr 432B tBLXr 14, $noreg, %3:tgpr, <regmask $lr $d8 $d9 $d10 $d11 $d12 $d13 $d14 $d15 $q4 $q5 $q6 $q7 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $s16 $s17 $s18 $s19 $s20 $s21 $s22 $s23 $s24 $s25 $s26 $s27 and 35 more...>, implicit...

On Tue, Oct 1, 2019 at 11:08 AM Graham Hunter <Graham.Hunter at arm.com> wrote: > Hi Luke, hi graham, thanks for responding in such an informative fashion. > > On 1 Oct 2019, at 09:21, Luke Kenneth Casson Leighton via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > typedef vec4 float[4]; // SEW=32,LMUL=4 probably > > static vec4 globalvec[1024]; // vscale ==

...2_Y<def> = COPY %vreg2; R600_TReg32:%vreg2 320B%vreg17<def> = COPY %vreg14:sel_y; R600_Reg32:%vreg17 R600_Reg128:%vreg14 336B%T2_Z<def> = COPY %vreg16; R600_Reg32:%vreg16 352B%T2_W<def> = COPY %vreg17; R600_Reg32:%vreg17 368B%T1_X<def> = COPY %vreg3; R600_TReg32:%vreg3 384B%T1_Y<def> = COPY %vreg2; R600_TReg32:%vreg2 400B%T1_Z<def> = COPY %vreg1; R600_TReg32:%vreg1 416B%T1_W<def> = COPY %vreg0; R600_TReg32:%vreg0 432BRETURN # End machine code for function main. # *** IR Dump Before Local Stack Slot Allocation ***: # Machine code for function main:...

...0_Reg128:%vreg1 R600_TReg32:%vreg17 register: %vreg1 replace range with [336r,352r:1) RESULT: [336r,352r:1)[352r,832r:0)[880B,1168B:0)  0 at 352r 1 at 336r 368B%vreg13<def> = MOV 1, 0, 0, 0, %ALU_LITERAL_X, 0, 0, 0, 1, pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg13 register: %vreg13 +[368r,432r:0) 384B%vreg0<def> = COPY %C0_X; R600_Reg32:%vreg0 register: %vreg0 +[384r,448B:0) +[448B,592B:0) +[880B,1168B:0) 400B%vreg47<def> = COPY %vreg2<kill>; R600_Reg32:%vreg47,%vreg2 register: %vreg47 +[400r,448B:0) phi-join +[448B,464r:1) 416B%vreg48<def> = COPY %vreg3<kill>; R600...

...******************************************************* tcpdump snippets: 0.99 server with Entourage client: 14:43:17.997889 IP noctis.shsu.edu.61359 > ab1-1-41.shsu.edu.imap: P 52:128(76) ack 156 win 65535 <nop,nop,timestamp 519041503 335641251> 0x0000: 4500 0080 adf9 4000 4006 384b 9e87 0bfc E..... at .@.8K.... 0x0010: 9e87 0b29 efaf 008f a87e ee7c fc30 de0e ...).....~.|.0.. 0x0020: 8018 ffff c716 0000 0101 080a 1eef f1df ................ 0x0030: 1401 7aa3 4130 3237 2055 4944 2046 4554 ..z.A027.UID.FET 0x0040: 4348 2032 2028 5549 4420 4...

...g17 > register: %vreg1 replace range with [336r,352r:1) RESULT: > [336r,352r:1)[352r,832r:0)[880B,1168B:0)  0 at 352r 1 at 336r > 368B%vreg13<def> = MOV 1, 0, 0, 0, %ALU_LITERAL_X, 0, 0, 0, 1, > pred:%PRED_SEL_OFF, 0; R600_Reg32:%vreg13 > register: %vreg13 +[368r,432r:0) > 384B%vreg0<def> = COPY %C0_X; R600_Reg32:%vreg0 > register: %vreg0 +[384r,448B:0) +[448B,592B:0) +[880B,1168B:0) > 400B%vreg47<def> = COPY %vreg2<kill>; R600_Reg32:%vreg47,%vreg2 > register: %vreg47 +[400r,448B:0) phi-join +[448B,464r:1) > 416B%vreg48<def> = COPY %vre...

...- -dsk/total- -net/total- ---paging-- ---system-- usr sys idl wai hiq siq| read writ| recv send| in out | int csw 0 0 52 48 0 0| 0 240k| 132B 372B| 0 0 | 76 84 0 0 60 40 0 0| 0 416k| 186B 322B| 0 0 | 73 81 3 2 55 41 0 0|8192B 184k| 384B 1316B| 0 0 | 97 80 0 0 100 0 0 0| 0 0 | 428B 746B| 0 0 | 40 22 0 0 100 0 0 0| 0 0 | 246B 462B| 0 0 | 24 13 0 0 98 2 0 0| 0 2728k| 66B 178B| 0 0 | 22 21 0 0 100 0 0 0| 0 0 | 308B 462B| 0...

...- -dsk/total- -net/total- ---paging-- ---system-- usr sys idl wai hiq siq| read writ| recv send| in out | int csw 0 0 52 48 0 0| 0 240k| 132B 372B| 0 0 | 76 84 0 0 60 40 0 0| 0 416k| 186B 322B| 0 0 | 73 81 3 2 55 41 0 0|8192B 184k| 384B 1316B| 0 0 | 97 80 0 0 100 0 0 0| 0 0 | 428B 746B| 0 0 | 40 22 0 0 100 0 0 0| 0 0 | 246B 462B| 0 0 | 24 13 0 0 98 2 0 0| 0 2728k| 66B 178B| 0 0 | 22 21 0 0 100 0 0 0| 0 0 | 308B 462B| 0...

...lt;def> = IMPLICIT_DEF; R600_Reg32:%vreg12 > Successors according to CFG: BB#1 > > 352BBB#1: derived from LLVM BB %25 > Predecessors according to CFG: BB#0 BB#3 > 368B%vreg5<def> = PHI %vreg2, <BB#0>, %vreg9, <BB#3>; R600_Reg32:%vreg5,%vreg2,%vreg9 > 384B%vreg6<def> = PHI %vreg3, <BB#0>, %vreg10, <BB#3>; R600_Reg128:%vreg6,%vreg3,%vreg10 > 400B%vreg7<def> = PHI %vreg13, <BB#0>, %vreg11, <BB#3>; R600_Reg32:%vreg7,%vreg13,%vreg11 > 416B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0...

...R600_Reg32:%vreg0 336B%vreg12<def> = IMPLICIT_DEF; R600_Reg32:%vreg12    Successors according to CFG: BB#1 352BBB#1: derived from LLVM BB %25    Predecessors according to CFG: BB#0 BB#3 368B%vreg5<def> = PHI %vreg2, <BB#0>, %vreg9, <BB#3>; R600_Reg32:%vreg5,%vreg2,%vreg9 384B%vreg6<def> = PHI %vreg3, <BB#0>, %vreg10, <BB#3>; R600_Reg128:%vreg6,%vreg3,%vreg10 400B%vreg7<def> = PHI %vreg13, <BB#0>, %vreg11, <BB#3>; R600_Reg32:%vreg7,%vreg13,%vreg11 416B%vreg29<def> = SETGT_INT 0, 0, 1, 0, 0, 0, %vreg0, 0, 0, 0, %vreg7, 0, 0, 0, 1,...

...eturned 0 trace:msi:MSI_ViewExecute 0x173498 (nil) trace:msi:MSI_ViewFetch 0x173498 0x9bd628 trace:msi:msi_view_get_row 0x1598a8 0x174f60 0 0x9bd628 trace:msi:db_get_raw_stream L"\430b\4131\4735\3abe\44a7\4225\460c\45f6\4432\418a\4337\4472\47b6\38ce\3b05\3b83\3acc\397f\3b4f\47ca\3a44\384e\3abf\384b\47cf\390d\3887\39cb\3acc\3809\39c1" -> L"Binary.AdobeCustomActions.E35C3ECB_5FDA_49E1_AB1F_D472B7CB9017" trace:msi:MSI_ViewClose 0x173498 trace:msi:msiobj_release object 0x173498 destroyed trace:msi:msiobj_release object 0x174f98 destroyed trace:msi:HANDLE_CustomType1 Calling func...