Displaying 7 results from an estimated 7 matches for "35f".
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2013 Sep 12
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
...rsi,rbx
33a: cpuid
33c: xchg rsi,rbx
33f: and esi,0x20
342: shr esi,0x5
345: lea rbp,[rip+0x0] # 34c <llvm::sys::getHostCPUName()+0xbc>
34c: lea r12,[rip+0x0] # 353 <llvm::sys::getHostCPUName()+0xc3>
353: cmove rbp,r12
357: lea rdi,[rsp+0x188]
35f: lea rsi,[rip+0x0] # 366 <llvm::sys::getHostCPUName()+0xd6>
In both other cases (2) & (3) SI is saved into stack region.
> I promise I'll do the review of your code after that.
Thanks.
Regards,
--
Adam
2011 Mar 08
1
Nesting random effects in lmer
...13.48 0 0 22S 0.926315789 6.491444216 0.109289617 0 0 0
03D 0.756097561 13.48 0 0 35B 0.442105263 15.36481862 0 0 0.218579235 0
03D 0.756097561 13.48 0 0 38E 0.98 12.35318275 0 0 0.43715847 0.218579235
13I 0.49 10.15 0 0.022537751 25Z 0.27 4.410677618 0.383141762 0 0 0
13I 0.49 10.15 0 0.022537751 35F 0.21 12.3559206 0 1.53256705 0
14A 0.512195122 16.23 0 0 20R 0.59375 6.349075975 0.225225225 0 0
Also is it possible to calculate the RSS of GLMMs? If so, how can I do
that?
Thank you for your help,
Maria
--
View this message in context: http://r.789695.n4.nabble.com/Nesting-random-effects-i...
2013 Sep 13
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
...and esi,0x20
> 342: shr esi,0x5
> 345: lea rbp,[rip+0x0] # 34c
> <llvm::sys::getHostCPUName()+0xbc>
> 34c: lea r12,[rip+0x0] # 353
> <llvm::sys::getHostCPUName()+0xc3>
> 353: cmove rbp,r12
> 357: lea rdi,[rsp+0x188]
> 35f: lea rsi,[rip+0x0] # 366
> <llvm::sys::getHostCPUName()+0xd6>
>
> In both other cases (2) & (3) SI is saved into stack region.
>
> > I promise I'll do the review of your code after that.
>
> Thanks.
>
> Regards,
> --
> Adam
> ________...
2013 Sep 13
2
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
...shr esi,0x5
>> 345: lea rbp,[rip+0x0] # 34c
>> <llvm::sys::getHostCPUName()+0xbc>
>> 34c: lea r12,[rip+0x0] # 353
>> <llvm::sys::getHostCPUName()+0xc3>
>> 353: cmove rbp,r12
>> 357: lea rdi,[rsp+0x188]
>> 35f: lea rsi,[rip+0x0] # 366
>> <llvm::sys::getHostCPUName()+0xd6>
>>
>> In both other cases (2) & (3) SI is saved into stack region.
>>
>> > I promise I'll do the review of your code after that.
>>
>> Thanks.
>>
>> Rega...
2013 Sep 12
0
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
Hi Adam,
> OK. I know the reason you cannot reproduce it, before posting
> the patch I've decided to check for AVX before checking AVX2,
> just not to cpuid AVX2 when we don't have AVX1 anyway.
I suspect it was also incompetence on my part. Given the differences
I'm seeing now I can't believe there'd be *no* difference in my tests
if I'd done them properly.
2013 Sep 12
3
[LLVMdev] [PATCH] Detect Haswell subarchitecture (i.e. using -march=native)
> That's far more worrying to me than not being able to detect Haswell.
> I can't reproduce the problem here at the moment: both debug and
> release builds give identical assembly for Host.cpp.
OK. I know the reason you cannot reproduce it, before posting the patch I've decided to check for AVX before checking AVX2, just not to cpuid AVX2 when we don't have AVX1 anyway.
2016 Dec 20
0
[ANNOUNCE] nftables 0.7 release
...e unrelated
to the direction.
* Explicit ruleset exportation, eg. nft export ruleset json, for
consistency with other existing ruleset commands.
* Always quote user-defined strings from rules when listing them.
* Support for RFC2732 IPv6 address format with brackets, eg.
dnat to [2001:838:35f:1::]:80
* Allow strings starting by underscores and dots in user-define
strings, conforming with POSIX.1-2008 (which is simultaneously IEEE
Std 1003.1-2008).
Resources
=========
The nftables code can be obtained from:
* http://netfilter.org/projects/nftables/downloads.html
* ftp://ftp.netfi...