Displaying 3 results from an estimated 3 matches for "34b764f3".
2011 Oct 06
0
[LLVMdev] MIPS 32bit code generation
Do you want to replace
lui $2, %hi(g1)
addiu $2, $2, %lo(g1)
with this?
la $2, g1
If that is the case, you can add this pattern.
def op_la : Operand<i32>;
def LA :
FI<0x09, (outs CPURegs:$dst), (ins op_la:$addr0, op_la:$addr1),
"la $dst, $addr0", [(set CPURegs:$dst,
(add (MipsHi tglobaladdr:$addr0), (MipsLo
tglobaladdr:$addr1)))], IIAlu>;
2011 Oct 05
4
[LLVMdev] MIPS 32bit code generation
Hi,
In order to emit "la $4,ADDR" instead of lui followed by addiu to load
the data address, could you advise what is proper way to revise td files in
the MIPS target?
Thanks,
--
Gang-Ryung Uh, Associate Professor
Department of Computer Science
College of Engineering, Boise State Univerisity
tel: 1 208 426-5691 e-mail:guh at boisestate.edu
http://cs.boisestate.edu/~uh
2011 Oct 07
2
[LLVMdev] MIPS 32bit code generation
...rtment of Computer Science
College of Engineering, Boise State Univerisity
tel: 1 208 426-5691 e-mail:guh at boisestate.edu
http://cs.boisestate.edu/~uh
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