Displaying 4 results from an estimated 4 matches for "32xi32".
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32x32
2018 Jul 24
2
KNL Vectorization with larger vector width
...stRegister value. When number of iterations=31 and I set vector
width=32 it gives <16xi32> and <8xi32> instructions.
However if i replicate same behavior with number of iterations=63 and I
set vector width=64, no vector instructions are emitted. it should do as
previous and gives <32xi32> and <16xi32> vector instructions.
How to do this?
What adjustments are needed?
Please help
I m trying this but unable to solve.
Thank You
On Tue, Jul 24, 2018 at 4:44 PM, hameeza ahmed <hahmed2305 at gmail.com> wrote:
> Hello,
> Do i need to change following function;
&g...
2018 Jul 23
2
KNL Vectorization with larger vector width
...e vectorized IR in gdb.
My goal is simple when i mention my target name in opt it should vectorize
by keeping the vector width= highest supported by my target which is 2048.
So $ opt -O3 -mytarget 1.ll -o 1_opt.ll
1_opt.ll should emit <2048xi32>,
<1024xi32>.........................<32xi32> etc.
How to achieve this? Please help.
Thank You
Regards
On Fri, Jul 13, 2018 at 12:40 AM, Hal Finkel <hfinkel at anl.gov> wrote:
>
> On 07/12/2018 02:32 PM, hameeza ahmed via llvm-dev wrote:
>
> Hello,
>
> If we pass march=knl, the llvm vectorizer (O3) generates max...
2017 Aug 16
3
LLVM JIT Compilation
...gt; {
> num1+num2;
> }
>
> so if i pass this through opt for auto vectorization. i keep vector
> width=32, i get optimized IR.
> then instead of passing the IR through llc i pass it through jit (lli).
> now i get run time compilation. at run time my vectorized IR code
> <32xi32>emits vector assembly something like avx/ simd instructions.
>
> Am i right? please guide me.
>
> Thank You
>
>
>
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2018 Jul 24
2
KNL Vectorization with larger vector width
Thank You.
Right now to see the effect i did following changes;
unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) {
if (Vector) {
if (ST->hasAVX512())
return 65536;
here i changed 512 to 65536. Then in loopvectorize.cpp i did following;
assert(MaxVectorSize <= 2048 && "Did not expect to pack so many elements"
" into