Displaying 5 results from an estimated 5 matches for "32_32_32_32".
2016 Feb 15
1
[PATCH 09/23] nv50-: separate vertex formats from surface format descriptions
...\
> }
>
> #define C4A(p, n, r, g, b, a, t, s, u, br) \
> @@ -308,6 +304,10 @@ const struct nv50_format
> nv50_format_table[PIPE_FORMAT_COUNT] =
> I3B(R32G32B32X32_SINT, RGBX32_SINT, C0, C1, C2, xx, SINT, 32_32_32_32,
> TR),
> I3B(R32G32B32X32_UINT, RGBX32_UINT, C0, C1, C2, xx, UINT, 32_32_32_32,
> TR),
>
> + F3A(R32G32B32_FLOAT, NONE, C0, C1, C2, xx, FLOAT, 32_32_32, tV),
> + I3A(R32G32B32_SINT, NONE, C0, C1, C2, xx, SINT, 32_32_32, tV),
> + I3A(R32G32B32_UINT, NONE, C0, C1, C2,...
2016 Feb 15
0
[PATCH 09/23] nv50-: separate vertex formats from surface format descriptions
...NV50_TIC_0_FMT_##sz, U_##u \
}
#define C4A(p, n, r, g, b, a, t, s, u, br) \
@@ -308,6 +304,10 @@ const struct nv50_format nv50_format_table[PIPE_FORMAT_COUNT] =
I3B(R32G32B32X32_SINT, RGBX32_SINT, C0, C1, C2, xx, SINT, 32_32_32_32, TR),
I3B(R32G32B32X32_UINT, RGBX32_UINT, C0, C1, C2, xx, UINT, 32_32_32_32, TR),
+ F3A(R32G32B32_FLOAT, NONE, C0, C1, C2, xx, FLOAT, 32_32_32, tV),
+ I3A(R32G32B32_SINT, NONE, C0, C1, C2, xx, SINT, 32_32_32, tV),
+ I3A(R32G32B32_UINT, NONE, C0, C1, C2, xx, UINT, 32_32_32, tV),
+
F2...
2016 Feb 15
24
[PATCH 01/23] nv50: import updated g80_defs.xml.h from rnndb
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++
1 file changed, 279 insertions(+)
create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
2015 Dec 19
2
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...2D_10X8, t),
+ C4B(ASTC_10x10_SRGB, NONE, C0, C1, C2, C3, UNORM, ASTC_2D_10X10, t),
+ C4B(ASTC_12x10_SRGB, NONE, C0, C1, C2, C3, UNORM, ASTC_2D_12X10, t),
+ C4B(ASTC_12x12_SRGB, NONE, C0, C1, C2, C3, UNORM, ASTC_2D_12X12, t),
+
C4A(R32G32B32A32_FLOAT, RGBA32_FLOAT, C0, C1, C2, C3, FLOAT, 32_32_32_32,
IBV, 0),
C4A(R32G32B32A32_UNORM, NONE, C0, C1, C2, C3, UNORM, 32_32_32_32, TV, 0),
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index 4757fe2..1c88580 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/g...
2015 Dec 19
0
[PATCH] nvc0: add hardware ETC2 and ASTC support where possible
...B(ASTC_10x10_SRGB, NONE, C0, C1, C2, C3, UNORM, ASTC_2D_10X10, t),
> + C4B(ASTC_12x10_SRGB, NONE, C0, C1, C2, C3, UNORM, ASTC_2D_12X10, t),
> + C4B(ASTC_12x12_SRGB, NONE, C0, C1, C2, C3, UNORM, ASTC_2D_12X12, t),
> +
> C4A(R32G32B32A32_FLOAT, RGBA32_FLOAT, C0, C1, C2, C3, FLOAT, 32_32_32_32,
> IBV, 0),
> C4A(R32G32B32A32_UNORM, NONE, C0, C1, C2, C3, UNORM, 32_32_32_32, TV, 0),
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 4757fe2..1c88580 100644
> --- a/src/gallium/drivers/nouveau/nvc0/...