search for: 30204

...ent we actually indexed only one user. The user's mailbox contains about 100.000 mails. This means that there is not really much data in the index. Are there any other hints or tips regarding this ?invalid uid ?0?"-message? Logfile: Sep 16 08:35:27 mailservertest dovecot: imap(user01)<30204><+IjNzqWS2s2sEQoK>: Debug: http-client[1]: peer 172.17.10.12:8983: Linked queue http://172.17.10.12:8983 (1 queues linked) Sep 16 08:35:27 mailservertest dovecot: imap(user01)<30204><+IjNzqWS2s2sEQoK>: Debug: http-client[1]: queue http://172.17.10.12:8983: Started new connectio...

Hi, we are trying to add full text search functionality with Solr to our Doveoct setup. Our Versions: OS: Debian 9 Tried versions: - Dovecot 2.2.7 with Solr 3.6 - Dovecot 2.3.4 with Solr 8.2 (2.2.7 from offical Debian repository, 2.3.4 from backports) Search is working mostly of the time perfrectly smooth. But sometimes following message appears in mail.err: dovecot:

...2 NA 20117 53 NA 20124 54 NA Feb 20201 55 NA 20207 56 NA 20214 57 NA 20227 58 NA Mar 20306 59 NA 20313 60 NA 20320 94 2003 Jan 30103 95 NA 30113 96 NA 30122 97 NA 30128 98 NA Feb 30204 99 NA 30214 100 NA 30219 101 NA Mar 30307 102 NA 30313 103 NA 30317 104 NA 30324 > str(data1) 'data.frame': 32 obs. of 3 variables: $ year : int 2001 NA NA NA NA NA NA NA NA NA ... $ month: chr "Jan" "" &...

...br> Module                  Size  Used by <br> wcfxo                  12032  0 <br> zaptel                219556  1 wcfxo <br> hfcsusb                28712  0 <br> mISDN_dtmf              8968  0 <br> mISDN_dsp             191968  0 <br> mISDN_x25dte           30204  0 <br> mISDN_core             73796  4 hfcsusb,mISDN_dtmf,mISDN_dsp,mISDN_x25dte </b><br> <span class="postbody"><br> <br> /etc/zaptel.conf: <br> </span><b># hfc-s pci a span definition <br> # most of the values should be bogus...

...0, c1, c2, c3, c4, c5 */ + /* 72 */ { 1209886, -36468, 515, 417, -13123, 203}, + /* 108 */ { 1130804, -27659, 296, 298, -10834, 221}, + /* 180 */ { 1162871, -27110, 247, 238, -10681, 268}, + /* 252 */ { 1220458, -28654, 247, 179, -10376, 298}, + /* 324 */ { 1280953, -30204, 247, 119, -9766, 304}, + /* 396 */ { 1344547, -31777, 247, 119, -8545, 292}, + /* 468 */ { 1420168, -34227, 269, 60, -7172, 256}, + /* 540 */ { 1490757, -35955, 274, 60, -5188, 197}, + /* 612 */ { 1599112, -42583, 398, 0, -1831, 119}, + /* 648 */ { 1366986, -16459, -27...

...0, c1, c2, c3, c4, c5 */ + /* 72 */ { 1209886, -36468, 515, 417, -13123, 203}, + /* 108 */ { 1130804, -27659, 296, 298, -10834, 221}, + /* 180 */ { 1162871, -27110, 247, 238, -10681, 268}, + /* 252 */ { 1220458, -28654, 247, 179, -10376, 298}, + /* 324 */ { 1280953, -30204, 247, 119, -9766, 304}, + /* 396 */ { 1344547, -31777, 247, 119, -8545, 292}, + /* 468 */ { 1420168, -34227, 269, 60, -7172, 256}, + /* 540 */ { 1490757, -35955, 274, 60, -5188, 197}, + /* 612 */ { 1599112, -42583, 398, 0, -1831, 119}, + /* 648 */ { 1366986, -16459, -27...

...c4, c5 */ > + /* 72 */ { 1209886, -36468, 515, 417, -13123, 203}, > + /* 108 */ { 1130804, -27659, 296, 298, -10834, 221}, > + /* 180 */ { 1162871, -27110, 247, 238, -10681, 268}, > + /* 252 */ { 1220458, -28654, 247, 179, -10376, 298}, > + /* 324 */ { 1280953, -30204, 247, 119, -9766, 304}, > + /* 396 */ { 1344547, -31777, 247, 119, -8545, 292}, > + /* 468 */ { 1420168, -34227, 269, 60, -7172, 256}, > + /* 540 */ { 1490757, -35955, 274, 60, -5188, 197}, > + /* 612 */ { 1599112, -42583, 398, 0, -1831, 119}, > + /* 648...

Some Tegra drivers might be complied as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1

...*/ { 1209886, -36468, 515, 417, -13123, 203}, >> + /* 108 */ { 1130804, -27659, 296, 298, -10834, 221}, >> + /* 180 */ { 1162871, -27110, 247, 238, -10681, 268}, >> + /* 252 */ { 1220458, -28654, 247, 179, -10376, 298}, >> + /* 324 */ { 1280953, -30204, 247, 119, -9766, 304}, >> + /* 396 */ { 1344547, -31777, 247, 119, -8545, 292}, >> + /* 468 */ { 1420168, -34227, 269, 60, -7172, 256}, >> + /* 540 */ { 1490757, -35955, 274, 60, -5188, 197}, >> + /* 612 */ { 1599112, -42583, 398, 0,...

Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c index 32794a999106..26ccd8df193f 100644 --- a/nvkm/subdev/volt/base.c +++ b/nvkm/subdev/volt/base.c @@ -101,6 +101,41 @@ nouveau_volt_set_id(struct

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding

Hiya, I''m trying to track down some throughput latency that our customer seems to be attributing to our product, I can''t see what he''s talking about, but I want to try and get some deeper granularity than I might get with something like smokeping, and maybe even see if its down to something tunable on our end. I''ve been looking for some examples on how