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...these attributes (i.e., strict ordering and > uniqueness). > I don't think it should matter for the purposes of aliasing. I also setup a LNT tester and found no execution-time failures on x86 for > -O0 and -O2 using the llvm test-suite and externals test-suite (i.e., > SPEC95/2K/2K6, etc.). > I'm wondering why not O3, too? That'll expose vector selection as well, not just VFP, which is a big source of super-registers, at least on ARM. Somehow it sounds as though you'll find more performance regressions than improvements, but that's my poor assumptions base...

...seems to imply this is a safe assumption and I haven't found a client that requires these attributes (i.e., strict ordering and uniqueness). I also setup a LNT tester and found no execution-time failures on x86 for -O0 and -O2 using the llvm test-suite and externals test-suite (i.e., SPEC95/2K/2K6, etc.). I'm still in the process of verifying there are no compile-time regressions. Chad On May 22, 2013, at 2:20 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > LLVM can model some quite complicated register banks now, and we even use registers to model some encoding cons...

Hi Michael, Thanks for testing this on your benchmarks and target. I think the results will help guide the direction we go. I tested the feature with spec2k/2k6 on AArch64/Kryo and saw minor performance swings, aside from a large (30%) improvement in spec2k6/libquantum. The primary loop in that benchmark has a conditional store, so I expected it to benefit. Regarding the cost model, I think the vectorizer's modeling of the conditional stores is good....

...> don't see how to fix both (a) and (b) (or to fix (a) well) without > > just disabling this specific aspect of GloblasModRef. > > Ok, but we need performance information to make sure this doesn’t > cause a regression in practice for LTO builds. For example, Spec 2K > and 2K6 are a reasonable place to start. > > > 1) Fix obvious issues with GloblasModRef and switch it to > > ValueHandles > > 2) Mail out a patch to disable this part of GlobalsModRef. I can > > put it behind a flag or however folks would like it to work. > > 3) Remove add...

LLVM can model some quite complicated register banks now, and we even use registers to model some encoding constraints. For example, a few ARM instructions like strexd have two register operands that must be an aligned pair of consecutive GPR registers (like r0, r1). This constraint is modeled with the GPRPair register class containing R0_R1, R2_R3, ... pseudo-registers. Sometimes ISAs also

...ous regressions this SGTM. > On Dec 13, 2016, at 5:41 AM, Matthew Simpson <mssimpso at codeaurora.org> wrote: > > Hi Michael, > > Thanks for testing this on your benchmarks and target. I think the results will help guide the direction we go. I tested the feature with spec2k/2k6 on AArch64/Kryo and saw minor performance swings, aside from a large (30%) improvement in spec2k6/libquantum. The primary loop in that benchmark has a conditional store, so I expected it to benefit. > > Regarding the cost model, I think the vectorizer's modeling of the conditional stores...

...at 5:41 AM, Matthew Simpson > > <mssimpso at codeaurora.org> wrote: > > > > Hi Michael, > > > > Thanks for testing this on your benchmarks and target. I think the > > results will help guide the direction we go. I tested the feature > > with spec2k/2k6 on AArch64/Kryo and saw minor performance swings, > > aside from a large (30%) improvement in spec2k6/libquantum. The > > primary loop in that benchmark has a conditional store, so I > > expected it to benefit. > > > > Regarding the cost model, I think the vectorizer&...

...om> Cc: llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Enabling scalarized conditional stores in the loop vectorizer Hi Michael, Thanks for testing this on your benchmarks and target. I think the results will help guide the direction we go. I tested the feature with spec2k/2k6 on AArch64/Kryo and saw minor performance swings, aside from a large (30%) improvement in spec2k6/libquantum. The primary loop in that benchmark has a conditional store, so I expected it to benefit. Regarding the cost model, I think the vectorizer's modeling of the conditional stores is good....

It would be great to know if and where an R code for Common Principal Component Analysis is available. Thanks, Daniel Daniel Berner Redpath Museum & Dept. of Biology McGill University 859 Sherbrooke St. W. Montreal, QC, H3A 2K6 Canada Phone: 514-398-4086 ext. 00908 Fax: 514-398-3185 Email: daniel.berner at mail.mcgill.ca

Hi everyone, Is there a trick to getting the FORTRAN benchmarks of spec2006 to compile using the nightly tester? The configure script correctly located my f2c installation yet the benchmarks do not compile. Thanks for any help. -- Matthew Simpson

...ils, but I don't see how to fix both (a) and > (b) (or to fix (a) well) without just disabling this specific aspect of > GloblasModRef. > > Ok, but we need performance information to make sure this doesn’t cause a > regression in practice for LTO builds. For example, Spec 2K and 2K6 are a > reasonable place to start. > > > 1) Fix obvious issues with GloblasModRef and switch it to ValueHandles > > 2) Mail out a patch to disable this part of GlobalsModRef. I can put it > behind a flag or however folks would like it to work. > > 3) Remove addEscapingUse...

...> *Subject:* Re: [llvm-dev] Enabling scalarized conditional stores in the > loop vectorizer > > > > Hi Michael, > > > > Thanks for testing this on your benchmarks and target. I think the results > will help guide the direction we go. I tested the feature with spec2k/2k6 > on AArch64/Kryo and saw minor performance swings, aside from a large (30%) > improvement in spec2k6/libquantum. The primary loop in that benchmark has a > conditional store, so I expected it to benefit. > > > > Regarding the cost model, I think the vectorizer's modeling o...

...> *Subject:* Re: [llvm-dev] Enabling scalarized conditional stores in the > loop vectorizer > > > > Hi Michael, > > > > Thanks for testing this on your benchmarks and target. I think the results > will help guide the direction we go. I tested the feature with spec2k/2k6 > on AArch64/Kryo and saw minor performance swings, aside from a large (30%) > improvement in spec2k6/libquantum. The primary loop in that benchmark has a > conditional store, so I expected it to benefit. > > > > Regarding the cost model, I think the vectorizer's modeling o...

....llvm.org<mailto:llvm-dev at lists.llvm.org>> Subject: Re: [llvm-dev] Enabling scalarized conditional stores in the loop vectorizer Hi Michael, Thanks for testing this on your benchmarks and target. I think the results will help guide the direction we go. I tested the feature with spec2k/2k6 on AArch64/Kryo and saw minor performance swings, aside from a large (30%) improvement in spec2k6/libquantum. The primary loop in that benchmark has a conditional store, so I expected it to benefit. Regarding the cost model, I think the vectorizer's modeling of the conditional stores is good....

...d conditional stores in the >> loop vectorizer >> >> >> >> Hi Michael, >> >> >> >> Thanks for testing this on your benchmarks and target. I think the >> results will help guide the direction we go. I tested the feature with >> spec2k/2k6 on AArch64/Kryo and saw minor performance swings, aside from a >> large (30%) improvement in spec2k6/libquantum. The primary loop in that >> benchmark has a conditional store, so I expected it to benefit. >> >> >> >> Regarding the cost model, I think the vectoriz...

....llvm.org<mailto:llvm-dev at lists.llvm.org>> Subject: Re: [llvm-dev] Enabling scalarized conditional stores in the loop vectorizer Hi Michael, Thanks for testing this on your benchmarks and target. I think the results will help guide the direction we go. I tested the feature with spec2k/2k6 on AArch64/Kryo and saw minor performance swings, aside from a large (30%) improvement in spec2k6/libquantum. The primary loop in that benchmark has a conditional store, so I expected it to benefit. Regarding the cost model, I think the vectorizer's modeling of the conditional stores is good....

Conceptually speaking, I think we really ought to enable this. Practically, I'm going to test it on our benchmarks (on x86), and see if we have any regressions - this seems like a fairly major change. Re targets - let's see where we stand w.r.t regressions first. What kind of performance testing have you already run on this? Do you know of specific targets where the cost model is known to

...nt of Mathematics and Statistics McGill University office: BH 1232 805 ouest, rue Sherbrooke tel: (514)-398-3842 Montreal fax: (514)-398-3899 Quebec e-mail: worsley at math.mcgill.ca Canada H3A 2K6 web: http://www.math.mcgill.ca/keith -.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.- r-help mailing list -- Read http://www.ci.tuwien.ac.at/~hornik/R/R-FAQ.html Send "info", "help", or "[un]subscribe" (in the "body&quo...

Ok folks, I wrote up the general high-level thoughts I have about stateful AA in a separate thread. But we need to sort out the completely and horribly broken aspects of GlobalsModRef today, and the practical steps forward. This email is totally about the practical stuff. Now, as to why I emailed this group of people and with this subject, the only pass pipeline that includes GlobalsModRef, is

I am happy to announce that I have successfully (and finally!) been able to pass a PCIe graphics card via VT-d to a Windows XP HVM DomU. About time! Config: -Intel Q6600 Core 2 Quad-Core, G0 stepping (I think) -Intel DQ35JO Motherboard, Q35 Chipset, BIOS v.991 (1/9/09), VT and VT-d enabled -nVidia 9500GT (for VT-d passthrough - DomU) -nVidia GeForce2 MX200 (Dom0 console) -Xen (build: