Displaying 8 results from an estimated 8 matches for "2ee".
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2013 Sep 10
0
[LLVMdev] Intel Memory Protection Extensions (and types question)
...which allows the bounds to be explicitly loaded and stored to bounds registers. Contrast with BNDLDX / BNDSTX, where the location is implicit. The BNDMOV instruction is also used for stack spills of the bounds registers. This allows MPX to be used for range checking in a similar way to the Thumb-2EE extensions.
>> The pointer and metadata exist in separate registers, but single instructions (loads and stores) operate on the pointer + metadata.
> Which MPX instructions do you mean here?
Ah, sorry, I was confusing MPX with one of the other HardBound-like schemes here. In MPX, you...
2009 Jun 18
1
Inverting a square... (PR#13762)
Refiling this. The actual fix was slightly more complicated. Will soon
be committed to R-Patched (aka 2.9.1 beta).
-p
rvaradhan at jhmi.edu wrote:
> Full_Name: Ravi Varadhan
> Version: 2.8.1
> OS: Windows
> Submission from: (NULL) (162.129.251.19)
>=20
>=20
> Inverting a matrix with solve(), but using LAPACK=3DTRUE, gives erroneo=
us
> results:
Thanks, but there seems
2013 Sep 10
2
[LLVMdev] Intel Memory Protection Extensions (and types question)
On Tue, Sep 10, 2013 at 1:19 PM, David Chisnall <David.Chisnall at cl.cam.ac.uk
> wrote:
> On 10 Sep 2013, at 10:13, Kostya Serebryany <kcc at google.com> wrote:
>
> > How did you come with 320 bits?
> > 320=64*4+64, which is the size of the metadata table entry plus pointer
> size,
>
>
> Sorry, that should have been 192. The specification allows the
2013 Sep 10
3
[LLVMdev] Intel Memory Protection Extensions (and types question)
...nds to be explicitly
> loaded and stored to bounds registers. Contrast with BNDLDX / BNDSTX,
> where the location is implicit. The BNDMOV instruction is also used for
> stack spills of the bounds registers. This allows MPX to be used for range
> checking in a similar way to the Thumb-2EE extensions.
>
Well, ok, you can treat this as a 192-bit fat pointer, but AFAICT this is
not the real intention of the MPX developers
since a fat pointer will break all ABIs, and MPX tries to preserve them.
I don't think we need fat pointers to support MPX in LLVM -- it will
complicate the i...
2005 Jun 09
1
krig.image help
> -----Original Message-----
> From: r-help-bounces at stat.math.ethz.ch
> [mailto:r-help-bounces at stat.math.ethz.ch]On Behalf Of Mike J Smith
> Sent: 09 June 2005 09:58
> To: r-help at stat.math.ethz.ch
> Subject: [R] krig.image help
>
>
> Hi
>
> I have recently been experimenting with the use of kriging, primarily
> through Goldensoftware's Surfer.
2003 Jul 03
1
ipv6 dialup: "nd6_lookup: failed to lookup" problem (4.8-REL)
...bytes (4)
Prefix length: 64
Flags: 0xc0
1... .... = Onlink
.1.. .... = Auto
..0. .... = Not router address
...0 .... = Not site prefix
Valid lifetime: 0x00278d00
Preferred lifetime: 0x00093a80
Prefix: 3ffe:80ee:2ee:1300::
axxem.hide:~# ifconfig tun0
tun0: flags=8051<UP,POINTOPOINT,RUNNING,MULTICAST> mtu 1500
inet6 fe80::290:27ff:fe78:9275%tun0 --> fe80::2d0:baff:fef4:e80%tun0 prefixlen 128 scopeid 0x6
inet 1.2.3.4 --> 5.6.7.8 netmask 0xffffffff
Opened by PID 42838
I ca...
2013 Sep 10
0
[LLVMdev] Intel Memory Protection Extensions (and types question)
On 10 Sep 2013, at 12:13, Kostya Serebryany <kcc at google.com> wrote:
> Well, ok, you can treat this as a 192-bit fat pointer, but AFAICT this is not the real intention of the MPX developers
> since a fat pointer will break all ABIs, and MPX tries to preserve them.
MPX is an implementation of the HardBound concept from UPenn, where this was a design goal (see also their 'low-fat
2010 Jul 06
6
Xen 3.2.1-2 on Debian Lenny 2.6.26 2.6.26-24
Hi,
Recently I have installed Debian Lenny on two different machines (different
ram size, disks, Xeon dual and quad core, filesystems both xfs and ext3,
etc). Packages versions:
Dom0:
ii libc6-xen 2.7-18lenny4 GNU C
Library: Shared libraries [Xen version]
ii libxenstore3.0 3.2.1-2 Xenstore
communications