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On 6/20/11 10:39 AM, Justin Holewinski wrote: > For the PTX back-end, I would like to introduce a configure-time > option to determine the number of architectural registers available to > LLVM register allocation during code generation. The motivation for > this is PTX is a virtual instruction set and the number of registers > is configurable in the output file. Thus, the

...tunately, I do not believe that is possible in this case (without major LLVM back-end changes). > > -- John T. > Thanks, Justin Holewinski -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110620/2e9334f1/attachment.html>

For the PTX back-end, I would like to introduce a configure-time option to determine the number of architectural registers available to LLVM register allocation during code generation. The motivation for this is PTX is a virtual instruction set and the number of registers is configurable in the output file. Thus, the number of registers specified via tablegen is arbitrary. For different