search for: 2ddev

Displaying 10 results from an estimated 10 matches for "2ddev".

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2008 Nov 09
0
Frederick David Santiago wants to add you as a friend.
...colspan=2>You are receiving this email because Frederick David Santiago (frederick_david310879@hotmail.com) has invited you to join. <Br> <Br> If you wish to never be contacted by PerfSpot.com again, please click here: <Br> <A href= 'http://perfspot.com/u.asp?e=icecast%2Ddev%40xiph%2Eorg' >http://perfspot.com/u.asp?e=icecast%2Ddev%40xiph%2Eorg</a> <Br> <Br> If you have any questions or require assistance please contact our support team: <Br> &nbsp&nbsp&nbsp&nbsp&nbsp&nbsp&nbsp&nbsp&nbsp&nbsp&nb...
2015 Jun 12
2
[LLVMdev] Register Allocation on IR
Hello all, I am trying to use the LLVM libraries to do register allocation on LLVM IR code -- and output IR as the result. There are two problems that arise when we try this : a. The LLVM backend requires that one goes through all the steps sequentially namely -- Instruction selection -- Scheduling and Formation -- SSA-based machine code optimizations -- Register
2005 Aug 11
1
About sampleenc and sampledec in appendix B
...img.hanmail.net/05img/banner/footbn_050801_smart.gif" width="350" height="48" border="0"></a><br></td> </tr> </table> <img src="http://wwl79.hanmail.net:4280/@from=num1224&rcpt=speex%2Ddev%40xiph%2Eorg&msgid=%3C20050811195142%2EHM%2Ezz000000003V9pl%40num1224%2Ewwl79%2Ehanmail%2Enet%3E">
2015 Aug 27
2
RFC: alloca -- specify address space for allocation
Please see inline. From: Chandler Carruth [mailto:chandlerc at google.com] Sent: Wednesday, August 26, 2015 7:03 PM To: Swaroop Sridhar <Swaroop.Sridhar at microsoft.com>; llvm-dev <llvm-dev at lists.llvm.org>; Philip Reames <listmail at philipreames.com>; Sanjoy Das <sanjoy at playingwithpointers.com> Subject: Re: [llvm-dev] RFC: alloca -- specify address space for
2015 Jun 15
2
[LLVMdev] Register Allocation on IR
...=Mfk2qtn1LTDThVkh6-oGglNfMADXfJdty4_bhmuhMHA&m=2OblNhBarTDXhb_DrXgPBErQpK4kzZPCqObSAYnWrNw&s=tieOG_IuhO0b9Eri02OVFdSWvkr0zlhF0WFyiUI1zkc&e=> > Sent from the LLVM - Dev mailing list archive > <https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.1065342.n5.nabble.com_LLVM-2DDev-2Df3.html&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=Mfk2qtn1LTDThVkh6-oGglNfMADXfJdty4_bhmuhMHA&m=2OblNhBarTDXhb_DrXgPBErQpK4kzZPCqObSAYnWrNw&s=Juy7RgBEqqIruJdLOsZMOwtOx_WfBU0iRbkQOe9TEOM&e=> > at Nabble.com. > _______________________________________________ > LLVM Dev...
2005 Aug 10
0
About sampleenc and sampledec in appendix B
...img.hanmail.net/05img/banner/footbn_050801_smart.gif" width="350" height="48" border="0"></a><br></td> </tr> </table> <img src="http://wwl79.hanmail.net:4280/@from=num1224&rcpt=speex%2Ddev%40xiph%2Eorg&msgid=%3C20050811100547%2EHM%2Ezz000000003V9pf%40num1224%2Ewwl79%2Ehanmail%2Enet%3E">
2017 Sep 13
2
General question about enabling partial inlining
Hi, I noticed some performance gains in some spec benchmarks without significant code size bloat when aggressively performing partial inlining, especially when the original callee spill CSRs in the entry block. I guess the partial inlining is not enabled mainly due to the code size. Is there any other issue which prevent the pass from being enabled? Do we have any plan or any on-going works
2019 Oct 01
2
PR43374 - when should comparing NaN values raise a floating point exception?
...; Kristof > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://nam02.safelinks.protection.outlook.com/?url=https%3A%2F%2Furldefense.proofpoint.com%2Fv2%2Furl%3Fu%3Dhttps-3A__lists.llvm.org_cgi-2Dbin_mailman_listinfo_llvm-2Ddev%26d%3DDwIGaQ%26c%3DslrrB7dE8n7gBJbeO0g-IQ%26r%3DO_4M49EtSpZ_-BQYeigzGv0P4__noMcSu2RYEjS1vKs%26m%3DQo0Q_p6SYp6xQeS0FnNcTNsL49ruqS1IRJVlRLKxLFg%26s%3DNRnIoHZkkjeMuMLb7Yy6-_V4Nin8zRTSXu9wVQW6LJA%26e&amp;data=02%7C01%7CKevin.Neal%40sas.com%7C1c2441d90c5b4d3c4e6408d7467aa4cc%7Cb1c14d5c362545b3a43095...
2017 Oct 03
5
General question about enabling partial inlining
...ra Forum, a Linux Foundation Collaborative Project. _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org> https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.llvm.org_cgi-2Dbin _mailman_listinfo_llvm-2Ddev <https://urldefense.proofpoint.com/v2/url?u=http-3A__lists.llvm.org_cgi-2Dbi n_mailman_listinfo_llvm-2Ddev&d=DwIGaQ&c=jf_iaSHvJObTbx-siA1ZOg&r=4ST7e3kMd0 GTi3w9ByK5Cw&m=zEValqMYe9FvZqI-GQUgWPmVUgbEq8OBAjTrBjz9xhY&s=1h4Cw3vDlJBIknk n0Ts3R_e3PU64h_dyvEkyCdonAVo&e=> &...
2019 Oct 01
5
PR43374 - when should comparing NaN values raise a floating point exception?
Hi, I’ve been investigating https://bugs.llvm.org/show_bug.cgi?id=43374, which is about clang/llvm producing code that triggers a floating point exception when x is NaN, when targeting ARM, in the below code example. int bar(float x) { return x!=x ? 0 : 1; } The C99 standard states in section 7.12.14: """ The relational and equality operators support the usual mathematical