Displaying 2 results from an estimated 2 matches for "2d224fd3".
2012 Apr 16
0
[LLVMdev] InstCombine adds bit masks, confuses self, others
...ply makes no sense to me.
I wrote a pile of heroics in the addressing mode matching for x86 to
specifically work around these obnoxious representations.
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2012 Apr 16
5
[LLVMdev] InstCombine adds bit masks, confuses self, others
Look at this silly function:
$ cat small.c
unsigned f(unsigned a, unsigned *p) {
unsigned x = a/4;
p[0] = x;
p[1] = x+x;
return p[1] - 2*p[0];
}
GCC turns this into straightforward code and figures out the 0 return value:
shrl $2, %edi
movl %edi, (%rsi)
addl %edi, %edi
movl %edi, 4(%rsi)
movl $0, %eax
ret
LLVM optimizes the code:
$ clang -O -S -o- small.c -emit-llvm
define i32