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2016 Dec 22
1
Spill hoisting on RAL: looking for some debugging ideas
Hi,
I am debugging private backend and faced interesting problem:
sometimes spill hoisting creates double stores.
(some output from -debug-only=regalloc).
First hoisting:
Checking redundant spills for 0 at 16r in %vreg19
[16r,144B:0)[144B,240B:1)[240B,280r:2)[296r,416B:3)[416B,456r:4)[472r,592B:5)
0 at 16r 1 at 144B-phi 2 at 240B-phi
3 at 296r 4 at 416B-phi 5 at 472r
Merged to stack int: SS#0 [16r,592B:0) 0 at x
hoisted: 16r STbo %vreg19, <fi#0>
Second below:
Checking redundant spills for 0 at 16r in %vreg19
[16r,96B:0)[144B,240B:1)[296r,416B:2)...