Displaying 6 results from an estimated 6 matches for "294979".
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29479
2013 Sep 19
0
[LLVMdev] Experimental Evaluation of the Schedulers in LLVM 3.3
...gt; Spills
> Spill Difference
> % Spill Difference
> Source
> 294471
> 294471
> 0
> 0.00%
> ILP
> 298222
> 294471
> 3751
> 1.27%
> BURR
> 287932
> 294471
> -6539
> -2.22%
> Fast
> 312787
> 294471
> 18316
> 6.22%
> source + MI
> 294979
> 294471
> 508
> 0.17%
> ILP + MI
> 296681
> 294471
> 2210
> 0.75%
> BURR + MI
> 289328
> 294471
> -5143
> -1.75%
> Fast + MI
> 302131
> 294471
> 7660
> 2.60%
>
> So, the best register pressure reduction scheduler is BURR. Note that enabl...
2005 Nov 30
0
nls and weighting
I posted this a week ago on r-devel but to no avail and hope this not
considered cross-posting:
===============================cut===============================
hi everybody,
which each release I hope that the section
"weights: an optional numeric vector of (fixed) weights. When present,
the objective function is weighted least squares. _not yet
2013 Sep 19
1
[LLVMdev] Experimental Evaluation of the Schedulers in LLVM 3.3
...gt; Spills
> Spill Difference
> % Spill Difference
> Source
> 294471
> 294471
> 0
> 0.00%
> ILP
> 298222
> 294471
> 3751
> 1.27%
> BURR
> 287932
> 294471
> -6539
> -2.22%
> Fast
> 312787
> 294471
> 18316
> 6.22%
> source + MI
> 294979
> 294471
> 508
> 0.17%
> ILP + MI
> 296681
> 294471
> 2210
> 0.75%
> BURR + MI
> 289328
> 294471
> -5143
> -1.75%
> Fast + MI
> 302131
> 294471
> 7660
> 2.60%
>
> So, the best register pressure reduction scheduler is BURR. Note that enabl...
2013 Sep 17
11
[LLVMdev] Experimental Evaluation of the Schedulers in LLVM 3.3
...fferences in the table below are calculated relative to the
source scheduler.
Heuristic Total Source
Spills Spills Spill Difference % Spill Difference
Source 294471 294471 0 0.00%
ILP 298222 294471 3751 1.27%
BURR 287932 294471 -6539 -2.22%
Fast 312787 294471 18316 6.22%
source + MI 294979 294471 508 0.17%
ILP + MI 296681 294471 2210 0.75%
BURR + MI 289328 294471 -5143 -1.75%
Fast + MI 302131 294471 7660 2.60%
So, the best register pressure reduction scheduler is BURR. Note that enabling
the MI scheduler makes things better when the SD scheduler is relatively weak
at reducing re...
2013 Jul 12
0
[LLVMdev] MI Scheduler vs SD Scheduler?
On Jul 2, 2013, at 2:35 PM, Ghassan Shobaki <ghassan_shobaki at yahoo.com> wrote:
> Thank you for the answers! We are currently trying to test the MI scheduler. We are using LLVM 3.3 with Dragon Egg 3.3 on an x86-64 machine. So far, we have run one SPEC CPU2006 test with the MI scheduler enabled using the option -fplugin-arg-dragonegg-llvm-option='-enable-misched:true' with -O3.
2013 Jul 02
2
[LLVMdev] MI Scheduler vs SD Scheduler?
Thank you for the answers! We are currently trying to test the MI scheduler. We are using LLVM 3.3 with Dragon Egg 3.3 on an x86-64 machine. So far, we have run one SPEC CPU2006 test with the MI scheduler enabled using the option -fplugin-arg-dragonegg-llvm-option='-enable-misched:true' with -O3. This enables the machine scheduler in addition to the SD scheduler. We have verified this by