Displaying 1 result from an estimated 1 matches for "2878d3d4".
2012 Oct 17
2
[LLVMdev] Problem with PostRASchedulerList.cpp - advice wanted
When you compile the attached file using
llc -march=x86 -mcpu=atom sched-bug.ll -o -
The Post-RA scheduler changes the sequence
movl %ecx, (%esp)
bsfl (%esp),%eax # this came from inline assembly code
to read
bsfl (%esp),%eax # this came from inline assembly code
movl %ecx, (%esp)
This is an incorrect schedule, because it seems the scheduler is not aware that the memory