Displaying 2 results from an estimated 2 matches for "251286".
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25128
2017 Aug 02
2
Efficiently ignoring upper 32 pointer bits when dereferencing
Hi all,
I am experiencing a problem with the representation of addresses in the
x86_64 TableGen backend and was hoping someone can tell me if it is
fixable. Any comments or hints in to send me in the right direction
would be greatly appreciated. I am using LLVM version 3.8, commit
251286.
I have an IR pass that stores metadata in the upper 32 bits of 64-bit
pointers in order to implement memory safety. The pass instruments
loads and stores to do an AND of the address with 0xffffffff to mask
out that metadata. E.g., when loading a 4-byte value from memory
pointed to by %rbx, t...
2017 Aug 02
2
Efficiently ignoring upper 32 pointer bits whendereferencing
...;
> I am experiencing a problem with the representation of addresses in
> the x86_64 TableGen backend and was hoping someone can tell me if it
> is fixable. Any comments or hints in to send me in the right direction
> would be greatly appreciated. I am using LLVM version 3.8, commit 251286.
>
>
> I have an IR pass that stores metadata in the upper 32 bits of 64-bit
> pointers in order to implement memory safety. The pass instruments
> loads and stores to do an AND of the address with 0xffffffff to mask
> out that metadata. E.g., when loading a 4-byte value from m...