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Displaying 3 results from an estimated 3 matches for "2371a2e5".

2013 Jun 13
0
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
In a multi-threaded environment, in order to ensure the memory ordering expressed by the memory fence, certain memory operations should not be moved across the fence, right? From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Thursday, June 13, 2013 11:18 AM To: Guo, Xiaoyi Cc: LLVM Dev Subject: Re: [LLVMdev] A question w.r.t fence instruction vs. noalias pointer On Thu, Jun 13, 2013 at
2013 Jun 13
1
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
...ointed-to memory has to be based on the noalias pointer. This applies to all threads in the program, not just the one the function is called from. -Eli -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130613/2371a2e5/attachment.html>
2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
On Thu, Jun 13, 2013 at 10:52 AM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > I mean something like a target-specific fence machine instruction which > forces ordering of all loads/stores. I want to clarify the meaning of > “noalias” in this case. Is the fence machine instruction considered > “touching” all memory and thus breaks the “noalias” contract? > A fence