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...ng masks to the IR. Yes. I think that the consensus is that we don't need to predicate the IR itself to support MIC-like processors. Thanks, Nadav -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130502/22bbda6f/attachment.html>

We're looking at how to handle masked vector operations in architectures like Knight's Corner. In our case, we have to translate from a fully vectorized IR that has mask support to llvm IR which does not have mask support. For non-trapping instructions this is fairly straightforward: ; Input t1 = add t2, t3, mask ; llvm IR -- assuming we want zeros in the false positions, which is not