search for: 205,24

...Roedel <jroedel at suse.de> --- arch/x86/kernel/idt.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c index b920f2352df5..367eb6a593dd 100644 --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -205,18 +205,24 @@ idt_setup_from_table(gate_desc *idt, const struct idt_data *t, int size, bool sy } } +static void init_idt_data(struct idt_data *data, unsigned int n, + const void *addr) +{ + BUG_ON(n > 0xFF); + + memset(data, 0, sizeof(*data)); + data->vector = n; + data->addr = ad...

...4160336.5435-29-joro at 8bytes.org --- arch/x86/kernel/idt.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c index 34fcc58b81b5..c19773174221 100644 --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -205,18 +205,24 @@ idt_setup_from_table(gate_desc *idt, const struct idt_data *t, int size, bool sy } } +static void init_idt_data(struct idt_data *data, unsigned int n, + const void *addr) +{ + BUG_ON(n > 0xFF); + + memset(data, 0, sizeof(*data)); + data->vector = n; + data->addr = ad...

...SF_UCODE_DATA_ALIGN 4096 /** - * ls_ucode_img_fill_headers - fill the WPR and LSB headers of an image + * acr_r352_ls_img_fill_headers - fill the WPR and LSB headers of an image * @acr: ACR to use * @img: image to generate for * @offset: offset in the WPR region where this image starts @@ -205,24 +222,25 @@ ls_ucode_img_load(const struct nvkm_subdev *subdev, lsf_load_func load_func) * Return: offset at the end of this image. */ static u32 -ls_ucode_img_fill_headers(struct acr_r352 *acr, struct ls_ucode_img *img, - u32 offset) +acr_r352_ls_img_fill_headers(struct acr_r352 *acr, +...

...inux/idr.h> #include <linux/poll.h> +#include <linux/kthread.h> #include <drm/drm_file.h> #include <drm/drm_modes.h> struct drm_device; struct drm_crtc; +struct drm_vblank_work; /** * struct drm_pending_vblank_event - pending vblank event tracking @@ -203,6 +205,24 @@ struct drm_vblank_crtc { * disabling functions multiple times. */ bool enabled; + + /** + * @worker: The &kthread_worker used for executing vblank works. + */ + struct kthread_worker *worker; + + /** + * @pending_work: A list of scheduled &drm_vblank_work items that are +...

..._data_verify(struct search *s) struct cached_dev *dc = container_of(s->d, struct cached_dev, disk); struct closure *cl = &s->cl; struct bio *check; - struct bio_vec *bv; + struct bio_vec bv, *bv2; + struct bvec_iter iter; int i; check = bio_clone(s->orig_bio, GFP_NOIO); @@ -205,24 +206,24 @@ void bch_data_verify(struct search *s) closure_bio_submit(check, cl, &dc->disk); closure_sync(cl); - bio_for_each_segment(bv, s->orig_bio, i) { - void *p1 = kmap(bv->bv_page); - void *p2 = kmap(check->bi_io_vec[i].bv_page); + bio_for_each_segment(bv, s->orig...

..._data_verify(struct search *s) struct cached_dev *dc = container_of(s->d, struct cached_dev, disk); struct closure *cl = &s->cl; struct bio *check; - struct bio_vec *bv; + struct bio_vec bv, *bv2; + struct bvec_iter iter; int i; check = bio_clone(s->orig_bio, GFP_NOIO); @@ -205,24 +206,24 @@ void bch_data_verify(struct search *s) closure_bio_submit(check, cl, &dc->disk); closure_sync(cl); - bio_for_each_segment(bv, s->orig_bio, i) { - void *p1 = kmap(bv->bv_page); - void *p2 = kmap(check->bi_io_vec[i].bv_page); + bio_for_each_segment(bv, s->orig...

..._data_verify(struct search *s) struct cached_dev *dc = container_of(s->d, struct cached_dev, disk); struct closure *cl = &s->cl; struct bio *check; - struct bio_vec *bv; + struct bio_vec bv, *bv2; + struct bvec_iter iter; int i; check = bio_clone(s->orig_bio, GFP_NOIO); @@ -205,24 +206,24 @@ void bch_data_verify(struct search *s) closure_bio_submit(check, cl, &dc->disk); closure_sync(cl); - bio_for_each_segment(bv, s->orig_bio, i) { - void *p1 = kmap(bv->bv_page); - void *p2 = kmap(check->bi_io_vec[i].bv_page); + bio_for_each_segment(bv, s->orig...

..._data_verify(struct search *s) struct cached_dev *dc = container_of(s->d, struct cached_dev, disk); struct closure *cl = &s->cl; struct bio *check; - struct bio_vec *bv; + struct bio_vec bv, *bv2; + struct bvec_iter iter; int i; check = bio_clone(s->orig_bio, GFP_NOIO); @@ -205,24 +206,24 @@ void bch_data_verify(struct search *s) closure_bio_submit(check, cl, &dc->disk); closure_sync(cl); - bio_for_each_segment(bv, s->orig_bio, i) { - void *p1 = kmap(bv->bv_page); - void *p2 = kmap(check->bi_io_vec[i].bv_page); + bio_for_each_segment(bv, s->orig...

..._data_verify(struct search *s) struct cached_dev *dc = container_of(s->d, struct cached_dev, disk); struct closure *cl = &s->cl; struct bio *check; - struct bio_vec *bv; + struct bio_vec bv, *bv2; + struct bvec_iter iter; int i; check = bio_clone(s->orig_bio, GFP_NOIO); @@ -205,24 +206,24 @@ void bch_data_verify(struct search *s) closure_bio_submit(check, cl, &dc->disk); closure_sync(cl); - bio_for_each_segment(bv, s->orig_bio, i) { - void *p1 = kmap(bv->bv_page); - void *p2 = kmap(check->bi_io_vec[i].bv_page); + bio_for_each_segment(bv, s->orig...

..._data_verify(struct search *s) struct cached_dev *dc = container_of(s->d, struct cached_dev, disk); struct closure *cl = &s->cl; struct bio *check; - struct bio_vec *bv; + struct bio_vec bv, *bv2; + struct bvec_iter iter; int i; check = bio_clone(s->orig_bio, GFP_NOIO); @@ -205,24 +206,24 @@ void bch_data_verify(struct search *s) closure_bio_submit(check, cl, &dc->disk); closure_sync(cl); - bio_for_each_segment(bv, s->orig_bio, i) { - void *p1 = kmap(bv->bv_page); - void *p2 = kmap(check->bi_io_vec[i].bv_page); + bio_for_each_segment(bv, s->orig...

Nvidia released some documentation on how CRC support works on their GPUs, hooray! So: this patch series implements said CRC support in nouveau, along with adding some special debugfs interfaces for some relevant igt-gpu-tools tests (already on the ML). First - we add some new functionality to kthread_work in the kernel, and then use this to add a new feature to DRM that Ville Syrj?l? came up

Nvidia released some documentation on how CRC support works on their GPUs, hooray! So: this patch series implements said CRC support in nouveau, along with adding some special debugfs interfaces for some relevant igt-gpu-tools tests (already on the ML). First - we add some new functionality to kthread_work in the kernel, and then use this to add a new feature to DRM that Ville Syrj?l? came up

...fusermount fail because the mountpoint is not mounted? */ - if (error && - strstr (error, "fusermount: entry for") != NULL) { + if (error_str && + strstr (error_str, "fusermount: entry for") != NULL) { goto not_mounted; } } @@ -205,10 +204,10 @@ main (int argc, char *argv[]) /* fusermount failed after N retries */ if (!quiet) { fprintf (stderr, _("%s: failed to unmount %s: %s\n"), - guestfs_int_program_name, mountpoint, error); + guestfs_int_program_name, mountpoint, error_str);...

This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send the code to manage then, but hopefully the

Hi All, I followed the instructions here at http://bderzhavets.wordpress.com/2009/06/10/setup-fedora-11-pv-domu-at-xen-3-4-1-dom0-kernel-2-6-30-rc6-tip-on-top-of-fedora-11/ However, when I do a "make menuconfig", I cannot see any XEN related configuration options. What am I missing? Thank you. Mr. Teo En Ming Dip(Mechatronics Engineering) BEng(Hons)(Mechanical Engineering)

From: Joerg Roedel <jroedel at suse.de> Hi, here is a rebased version of the latest SEV-ES patches. They are now based on latest tip/master instead of upstream Linux and include the necessary changes. Changes to v4 are in particular: - Moved early IDT setup code to idt.c, because the idt_descr and the idt_table are now static - This required to make stack protector work early (or

From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into

From: Joerg Roedel <jroedel at suse.de> Hi, here is the fourth version of the SEV-ES Guest Support patches. I addressed the review comments sent to me for the previous version and rebased the code v5.8-rc5. The biggest change in this version is the IST handling code for the #VC handler. I adapted the entry code for the #VC handler to the big pile of entry code changes merged into

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,

From: Joerg Roedel <jroedel at suse.de> Hi, here is the new version of the SEV-ES client enabling patch-set. It is based on the latest tip/master branch and contains the necessary changes. In particular those ar: - Enabling CR4.FSGSBASE early on supported processors so that early #VC exceptions on APs can be handled. - Add another patch (patch 1) to fix a KVM frame-size build