Displaying 20 results from an estimated 37 matches for "20121017".
2012 Oct 17
2
[LLVMdev] Problem with PostRASchedulerList.cpp - advice wanted
...e as a barrier or by including memory references in scheduling decisions.
Thanks,
Preston G
--
Preston Gurd <preston.gurd at intel.com>
Intel Waterloo
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2012 Oct 17
2
[LLVMdev] please advise on PassManager
...Builder::EP_EnabledOnOptLevel0 insertion point, at
-O1+ we use PassManagerBuilder::EP_OptimizerLast,
but the logic looks the same.
What do I miss?
Thanks!
--kcc
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2012 Oct 17
2
[LLVMdev] Dminator set question
How can I get the dominator set for each basicblock in a function
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2012 Oct 17
2
[LLVMdev] Redundant Add Operation in Code Generation?
...> yet are generated?
>
> CodeGenPrepare manipulates GEPs in a way that can expose redundancy
> where it wasn't obvious before.
>
> -Eli
>
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2012 Oct 17
0
[LLVMdev] please advise on PassManager
...where optimizing a function can dramatically shrink it (due to abstraction penalties being removed)… which then makes it a much strongly inline candidate.
-Chris
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2012 Oct 17
9
[LLVMdev] Announcement: Phabricator for code reviews
...that e-mail is still the reference medium for code reviews. Please let
me know about any problems with Phabricator or the documentation you find.
Cheers,
/Manuel
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2012 Oct 16
2
how to best import Evolution/Thunderbird mail into dovecot?
...other mail headers..
that dovecot uses as it's own?
Thanks,
Chris.
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2012 Oct 17
1
[LLVMdev] please advise on PassManager
...xplicit instead of implicit, and thus removing the need for a
dummy pass (which is quite a hack) to control them. Instead, they would be
more directly controlled.
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2012 Oct 17
3
[LLVMdev] Hexagon Assembly parser question
...The other seems like it will create many
more problems in the long run. Any thoughts, comments, or recommended
directions are appreciated.
Regards,
David
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2012 Oct 18
4
Trouble with parentheses in Markdown hyperlinks
...y fixed by altering the regex responsible for
parsing [name](url) syntax to be lazy rather than eager.
--
Cheers,
Andrew Pennebaker
www.yellosoft.us
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2012 Oct 17
4
[LLVMdev] Redundant Add Operation in Code Generation?
..."add i32 %lsr_iv8, %tmp45" is done multiple times,
appearing that there are two redundant add operations that are not needed
yet are generated?
Thanks.
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2012 Oct 17
1
[LLVMdev] MI DAG constructor indeterminism
...r idea than using SetVector/MapVector for Value* keys.
For SUnits we could just key on NodeNum. Go ahead and file a bug and/or
submit a patch.
Thanks!
-Andy
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2012 Oct 17
0
[LLVMdev] Hexagon Assembly parser question
...____________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
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2012 Oct 17
0
[LLVMdev] SimplifyCFG vs loops
...fe" transformations in a quick
> pass, and having a more aggressive pass that does preserve loop structure?
It's not clear what the problem is.
Dan
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2012 Oct 17
0
[LLVMdev] DWARF 2/3 backwards compatibility?
> My GDB Testsuite runs have been failing more tests, and now an internal
test
> has started failing on some missing dwarf 3 records.
What is the error message or the nature of the failures you are seeing ?
Pranav
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation
2012 Oct 17
0
[LLVMdev] [cfe-dev] Announcement: Phabricator for code reviews
...______________________________________
> cfe-dev mailing list
> cfe-dev at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/cfe-dev
>
>
>
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2012 Oct 17
0
[LLVMdev] Redundant Add Operation in Code Generation?
On Wed, Oct 17, 2012 at 1:22 PM, Ryan Taylor <ryta1203 at gmail.com> wrote:
> I'm curious why I am seeing this:
>
> %uglygep18.sum = add i32 %lsr_iv8, %tmp45
> %scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
> %scevgep1920 = bitcast i8* %scevgep19 to i16*
> %tmp78 = load i16* %scevgep1920, align 2
> %uglygep14.sum = add i32 %lsr_iv8, %tmp45
2012 Oct 17
2
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as
On 17 October 2012 15:05, Greg Fitzgerald <garious at gmail.com> wrote:
> + virtual void EmitMappingSymbol(bool IsData);
I'd use an enum, or have multiple internal implementations...
EmitDataMappingSymbol -> { nop on base class, on ARM, prints "$d" }
EmitCodeMappingSymbol -> { nop on base class, calling either
EmitThumbMappingSymbol or EmitARMMappingSymbol (private)
2012 Oct 17
0
[LLVMdev] R_ARM_ABS32 disassembly with integrated-as
...g of code and nowadays, most of it is format agnostic, I think
> (asm, elf).
>
>
> --
> cheers,
> --renato
>
> http://systemcall.org/
>
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2012 Oct 17
0
[LLVMdev] Redundant Add Operation in Code Generation?
...gt;> CodeGenPrepare manipulates GEPs in a way that can expose redundancy
>> where it wasn't obvious before.
>>
>> -Eli
>>
>
>
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