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2011 Aug 15
0
[LLVMdev] Register Pressure Computation during Pre-Allocation Scheduling
On Aug 15, 2011, at 1:27 AM, Ghassan Shobaki wrote: > One factor that is causing our current register pressure estimate to be off is not being able to properly account for live-in and live-out registers (both virtual and physical). As far as we can tell, LLVM represents live-in regs with CopyFromReg instrs and live-out regs with CopyToReg instrs. However, it looks that in a given basic block,
2011 Aug 16
2
[LLVMdev] Register Pressure Computation during Pre-Allocation Scheduling
...some of them to the middle of the block, thus resulting in an incorrect under-estimate of reg pressure. We would like to avoid that if possible.  /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20110816/1e1c6b36/attachment.html>
2011 Aug 15
2
[LLVMdev] Register Pressure Computation during Pre-Allocation Scheduling
Hi, We are working on a research project whose objective is developing a pre-allocation scheduling algorithm that achieves the optimal balance between exploiting ILP (hiding latencies) and minimizing register pressure.  A prototype of our algorithm has been implemented and integrated into an experimental version of LLVM 2.9. Our algorithm is based on a combinatorial optimization approach, which