Displaying 2 results from an estimated 2 matches for "1d350dc9".
2012 Oct 19
0
[LLVMdev] Redundant Add Operation in Code Generation?
...ally, MachineCSE could clean this up if it doesn't get folded into the address, but like LSR, it tries hard not to increase register pressure.
-Andy
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2012 Oct 17
4
[LLVMdev] Redundant Add Operation in Code Generation?
I'm curious why I am seeing this:
*%uglygep18.sum = add i32 %lsr_iv8, %tmp45*
%scevgep19 = getelementptr i8* %parBits_017, i32 %uglygep18_sum
%scevgep1920 = bitcast i8* %scevgep19 to i16*
%tmp78 = load i16* %scevgep1920, align 2
* %uglygep14.sum = add i32 %lsr_iv8, %tmp45*
%scevgep15 = getelementptr i8* %extIn_013, i32 %uglygep14_sum
%scevgep1516 = bitcast i8* %scevgep15 to i16*