search for: 1cf3d92

Displaying 5 results from an estimated 5 matches for "1cf3d92".

2015 Oct 09
4
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
...ed_irq can use the new function as well. Then this function can be moved to arch/x86/kvm/hyperv.c. > + > void kvm_register_irq_ack_notifier(struct kvm *kvm, > struct kvm_irq_ack_notifier *kian) > { > diff --git a/virt/kvm/irqchip.c b/virt/kvm/irqchip.c > index 716a1c4..1cf3d92 100644 > --- a/virt/kvm/irqchip.c > +++ b/virt/kvm/irqchip.c > @@ -144,11 +144,13 @@ static int setup_routing_entry(struct kvm_irq_routing_table *rt, > > /* > * Do not allow GSI to be mapped to the same irqchip more than once. > - * Allow only one to one mapping between...
2015 Oct 09
4
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
...ed_irq can use the new function as well. Then this function can be moved to arch/x86/kvm/hyperv.c. > + > void kvm_register_irq_ack_notifier(struct kvm *kvm, > struct kvm_irq_ack_notifier *kian) > { > diff --git a/virt/kvm/irqchip.c b/virt/kvm/irqchip.c > index 716a1c4..1cf3d92 100644 > --- a/virt/kvm/irqchip.c > +++ b/virt/kvm/irqchip.c > @@ -144,11 +144,13 @@ static int setup_routing_entry(struct kvm_irq_routing_table *rt, > > /* > * Do not allow GSI to be mapped to the same irqchip more than once. > - * Allow only one to one mapping between...
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (synic) which is a building block of the Hyper-V paravirtualized device bus (vmbus). Synic is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 09
5
[PATCH 0/2] Hyper-V synthetic interrupt controller
This patchset implements the KVM part of the synthetic interrupt controller (synic) which is a building block of the Hyper-V paravirtualized device bus (vmbus). Synic is a lapic extension, which is controlled via MSRs and maintains for each vCPU - 16 synthetic interrupt "lines" (SINT's); each can be configured to trigger a specific interrupt vector optionally with auto-EOI
2015 Oct 09
0
[PATCH 1/2] kvm/x86: Hyper-V synthetic interrupt controller
..._list, + link) + if (kian->gsi == gsi) + kian->irq_acked(kian); + srcu_read_unlock(&kvm->irq_srcu, idx); +} + void kvm_register_irq_ack_notifier(struct kvm *kvm, struct kvm_irq_ack_notifier *kian) { diff --git a/virt/kvm/irqchip.c b/virt/kvm/irqchip.c index 716a1c4..1cf3d92 100644 --- a/virt/kvm/irqchip.c +++ b/virt/kvm/irqchip.c @@ -144,11 +144,13 @@ static int setup_routing_entry(struct kvm_irq_routing_table *rt, /* * Do not allow GSI to be mapped to the same irqchip more than once. - * Allow only one to one mapping between GSI and MSI. + * Allow only one t...