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On Tue, Jan 17, 2017 at 5:42 PM, Alastair Bridgewater <alastair.bridgewater at gmail.com> wrote: > HDMI specification 1.4a, table 8-15 is very explicitly a "must > support at least one of" table, not a "must support all of" table. > It is not hard to find hardware that does not support some of the > so-called "mandatory" modes. > > More

...1<-1> t31: ch = brcond t18, t29, BasicBlock:ch<if.else 0xa5f8d48> t33: ch = br t31, BasicBlock:ch<if.then 0xa5f8c98> The Optimized lowered selection DAG does not contain the* AND* node, but it does have a truncate which would seem to stand in for it given the result is only 1bit wide and the xor following it is operating on 1-bit wide values: t22: i8 = srl t19, Constant:i64<1> t35: i1 = truncate t22 t29: i1 = xor t35, Constant:i1<-1> t31: ch = brcond t18, t29, BasicBlock:ch<if.else 0xa5f8d48> t33: ch = br t31, BasicBlock:ch&l...

...racking and shadow based heap/global object access tracking. In our initial implementation, we plan to provide both results to developers simultaneously. There are a number of alternative approaches that could be explored, including a 4byte:4byte 32-bit hotness counter per 4-byte field, or a 1byte:1bit bitmap for field byte granularity with sampling. Extensions to the proposals above could also be explored in the future, such as combining the struct and shadow modes for better results. Additionally, we may use the 7 shadow bits differently to track temporal locality information instead. Any sugg...

...brcond t18, t29, BasicBlock:ch<if.else 0xa5f8d48> > t33: ch = br t31, BasicBlock:ch<if.then 0xa5f8c98> > > The Optimized lowered selection DAG does not contain the*AND* node, > but it does have a truncate which would seem to stand in for it given > the result is only 1bit wide and the xor following it is operating on > 1-bit wide values: > > t22: i8 = srl t19, Constant:i64<1> > t35: i1 = truncate t22 > t29: i1 = xor t35, Constant:i1<-1> > t31: ch = brcond t18, t29, BasicBlock:ch<if.else 0xa5f8d48> > t33: ch...

...aka 'int') to parameter of incompatible type '__attribute__((__vector_size__(8 * sizeof(_Bool)))) _Bool' (vector of 8 '_Bool' values) v4i32_r1 = __builtin_dongxin_add_32(v4i32_r2,v4i32_r2,vm_1); I searched online ,bool is sizeof 1 byte,and Bool size is also bigger than 1bit. Is there a way I can define a variable which type is v8i1 . Thanks YuLiu liuyu11 at ict.ac.cn -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180424/68242f46/attachment-0001.html> -------------- n...

...3D must at lesst support one of the modes listed in that table. But that's just the very start of the story and we are really talking about the 3D_present bit in the HMDI VSDB and the associated "mandatory" modes (the term comes from the spec). HDMI 1.4a Page 155: "3D_present [1bit] This bit indicates 3D support by the HDMI Sink, including the mandatory formats. If set (=1), an HDMI Sink supports the 3D video formats that are mandatory formats," Continuing page 157: "If 3D_present is set (=1), an HDMI Sink shall support 3D video formats per the following requirem...

...the > modes listed in that table. But that's just the very start of the story > and we are really talking about the 3D_present bit in the HMDI VSDB and > the associated "mandatory" modes (the term comes from the spec). > > HDMI 1.4a Page 155: > > "3D_present [1bit] This bit indicates 3D support by the HDMI Sink, > including the mandatory formats. If set (=1), an HDMI Sink supports the > 3D video formats that are mandatory formats," > > Continuing page 157: > > "If 3D_present is set (=1), an HDMI Sink shall support 3D video formats...

...* Batched ticketlock: 2n bits in lock is divided as follows: + * --------------------------------------------------------------- + * | tail | head | + * --------------------------------------------------------------- + * | TAIL (n-1) | SLOWPATH_FLAG (1bit) | HEAD (n-1) | LOCK (1bit)| + * --------------------------------------------------------------- + * + * batch_size determines maximum number of cpus contending for lock at any time. + * (n-1)-log(batch_size) bits of head and tail determine eligibility for + * contending for lock. + * SLOWPATH_FLAG...

...* Batched ticketlock: 2n bits in lock is divided as follows: + * --------------------------------------------------------------- + * | tail | head | + * --------------------------------------------------------------- + * | TAIL (n-1) | SLOWPATH_FLAG (1bit) | HEAD (n-1) | LOCK (1bit)| + * --------------------------------------------------------------- + * + * batch_size determines maximum number of cpus contending for lock at any time. + * (n-1)-log(batch_size) bits of head and tail determine eligibility for + * contending for lock. + * SLOWPATH_FLAG...

...r initial > > implementation, we plan to provide both results to developers > > simultaneously. > > > There are a number of alternative approaches that could be > > explored, > > including a 4byte:4byte 32-bit hotness counter per 4-byte field, or > > a 1byte:1bit bitmap for field byte granularity with sampling. > > Extensions to the proposals above could also be explored in the > > future, such as combining the struct and shadow modes for better > > results. Additionally, we may use the 7 shadow bits differently to > > track temporal...

...= brcond t18, t29, BasicBlock:ch<if.else 0xa5f8d48> > t33: ch = br t31, BasicBlock:ch<if.then 0xa5f8c98> > > The Optimized lowered selection DAG does not contain the* AND* node, but > it does have a truncate which would seem to stand in for it given the > result is only 1bit wide and the xor following it is operating on 1-bit > wide values: > > t22: i8 = srl t19, Constant:i64<1> > t35: i1 = truncate t22 > t29: i1 = xor t35, Constant:i1<-1> > t31: ch = brcond t18, t29, BasicBlock:ch<if.else 0xa5f8d48> >...

...heap/global object access tracking. In our initial implementation, we plan > to provide both results to developers simultaneously. > > There are a number of alternative approaches that could be explored, > including a 4byte:4byte 32-bit hotness counter per 4-byte field, or a > 1byte:1bit bitmap for field byte granularity with sampling. Extensions to > the proposals above could also be explored in the future, such as combining > the struct and shadow modes for better results. Additionally, we may use > the 7 shadow bits differently to track temporal locality information &g...

This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect

This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect

This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on

This patch set is intended for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on

This patch set is for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on native

This patch set is for the next merge window. They are just enhancements of the already merged patches or ia64 porting from x86 paravirt techniques and that their quality is enough for merge. This patch set is for binary patch optimization for paravirt_ops which depends on the patch series I sent out, ia64/pv_ops, xen: more paravirtualization. The binary patch optimization is important on native

This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect call into in-place execution or direct call. The first patch imports helper functions which themselves doesn't interesting things. The second patch replaces the indirect function calls with a

This patch set is for binary patch optimization for paravirt_ops. The binary patch optimization is important on native case because the paravirt_ops overhead can be reduced by converting indirect call into in-place execution or direct call. The first patch imports helper functions which themselves doesn't interesting things. The second patch replaces the indirect function calls with a