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2018 Apr 09
1
llvm-dev Digest, Vol 166, Issue 22
Hi Krzysztof, Sure, please see below. DAG.dump.() before and after, annotated with what I believe the DAG means. I've spent some time debugging the method but it's proving difficult to determine where the logic is misfiring. Disabling the entire combine causes a lot of failing x86-64 tests - I may have to learn an upstream vector ISA to make progress on this. Thank you >From your
2003 Sep 29
0
How to prevent echo ?
Hi all, i have following scenario: ____________* 1____ ______________* 2______ | | | | analog/Zap --> IAX2 ----> DSL ---> INTERNET ---> Backbone/100Mbit ----> IAX2 ---> Zap/pri(E400P) ----> PSTN And, if i make a call from *1 over *2 to PSTN, i can hear an echo i...
2020 Feb 21
4
[RFC] Allowing debug intrinsics to reference multiple SSA Values
What would it look like without this extension? If we modeled it as if all the register values were already on the stack (an extension of the current way where the singular value is modeled as being already on the stack, if I understand it correctly?)? If it's decided that the best approach is to introduce something like DW_OP_LLVM_register - might be worth migrating to that first (basically