Displaying 1 result from an estimated 1 matches for "1866f9e4".
2013 Jul 24
1
[LLVMdev] Pre-RA scheduler details
Hi,
I'm interested in the two pre-RA instruction schedulers used in LLVM,
list-hybrid and list-ilp. I've done some digging on the internet and played
around with executing some test files using the two schedules. However, I'm
still uncertain of the behaviors and heuristics used in each.
For example, the XXXX_ls_rr_sort::isReady for hybrid includes a 3 cycle
readydelay (seems