Displaying 1 result from an estimated 1 matches for "1836caeb".
2014 Nov 26
2
[LLVMdev] How to make correct pattern for instruction?
Hi,
I'm a beginner user using LLVM, and I'm trying to create a new backend
using CPU0 Tutorial as reference.
I have two instructions for add: add and addi (this is a pseudo
instruction, but imediate operations is not available in architecture).
That is my idea: When the LLVM instruction selection find addi r3 = r2 +
value
must convert to this:
- load r1, value
- add r3 = r2 + r1
In