Displaying 1 result from an estimated 1 matches for "1825b729".
2013 Jul 10
3
[LLVMdev] unaligned AVX store gets split into two instructions
Hi,
Yes. On Sandybridge 256-bit loads/stores are double pumped. This means that they go in one after the other in two cycles. On Haswell the memory ports are wide enough to allow a 256bit memory operation in one cycle. So, on Sandybridge we split unaligned memory operations into two 128bit parts to allow them to execute in two separate ports. This is also what GCC and ICC do.
It is very