Displaying 5 results from an estimated 5 matches for "1741,11".
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1541,11
2012 Dec 18
0
[PATCH] nested vmx: nested TPR shadow/threshold emulation
...IVATE_MSR_BITMAP |
CPU_BASED_PAUSE_EXITING |
CPU_BASED_RDPMC_EXITING |
+ CPU_BASED_TPR_SHADOW |
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
data = gen_vmx_msr(data, VMX_PROCBASED_CTLS_DEFAULT1, host_data);
break;
@@ -1707,6 +1741,11 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs,
if ( ctrl & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES )
nvcpu->nv_vmexit_pending = 1;
break;
+ case EXIT_REASON_TPR_BELOW_THRESHOLD:
+ ctrl = __n2_exec_control(v);
+ if ( ctrl & CPU...
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
...#define NVC0_3D_IBLEND_FUNC_DST_RGB(i0) (0x00001e0c + 0x20*(i0))
+#define NVC0_3D_IBLEND_FUNC_DST_RGB(i0) (0x00001e0c + 0x20*(i0))
#define NVC0_3D_IBLEND_EQUATION_ALPHA(i0) (0x00001e10 + 0x20*(i0))
#define NVC0_3D_IBLEND_EQUATION_ALPHA_FUNC_ADD 0x00008006
@@ -1647,11 +1741,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NVC0_3D_SP(i0) (0x00002000 + 0x40*(i0))
#define NVC0_3D_SP__ESIZE 0x00000040
-#define NVC0_3D_SP__LEN 0x00000006
+#define NVC0_3D_SP__LEN 0x00000006
#define NVC0_3D_SP_SELECT(i0) (...
2014 Dec 31
0
[PATCH 2/2] nvc0: regenerate rnndb headers
...#define NVC0_3D_IBLEND_FUNC_DST_RGB(i0) (0x00001e0c + 0x20*(i0))
+#define NVC0_3D_IBLEND_FUNC_DST_RGB(i0) (0x00001e0c + 0x20*(i0))
#define NVC0_3D_IBLEND_EQUATION_ALPHA(i0) (0x00001e10 + 0x20*(i0))
#define NVC0_3D_IBLEND_EQUATION_ALPHA_FUNC_ADD 0x00008006
@@ -1259,11 +1741,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NVC0_3D_SP(i0) (0x00002000 + 0x40*(i0))
#define NVC0_3D_SP__ESIZE 0x00000040
-#define NVC0_3D_SP__LEN 0x00000006
+#define NVC0_3D_SP__LEN 0x00000006
#define NVC0_3D_SP_SELECT(i0) (...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update
2014 Dec 31
2
[PATCH 1/2] nv50: regenerate rnndb headers
The headers hadn't been regenerated in a long time, and there were a few
minor divergences. Among other things, rnndb has changed naming to
G80/etc, for now I've not tackled switching that over and manually
replaced the nvidia codenames back to the chip ids. However no other
modifications of the headergen'd headers was done.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>