Displaying 2 results from an estimated 2 matches for "16bf2f1".
2009 Jun 21
0
[PATCH] nv50: support for SLE, SNE, SEQ, SGT
---
src/gallium/drivers/nv50/nv50_program.c | 118 +++++++++++++++++++++----------
1 files changed, 80 insertions(+), 38 deletions(-)
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 16bf2f1..75c5cea 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -810,7 +810,11 @@ emit_precossin(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
#define CVTOP_TRUNC 0x07
#define CVTOP_SAT 0x08
#define CVTOP_ABS 0x10
+#define CVTOP_AB...
2009 Jun 21
0
[PATCH] nv50: initial support for IF, ELSE, ENDIF insns
---
src/gallium/drivers/nv50/nv50_program.c | 162 +++++++++++++++++++++++++------
src/gallium/drivers/nv50/nv50_program.h | 1 +
2 files changed, 132 insertions(+), 31 deletions(-)
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 5594560..16bf2f1 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -90,6 +90,8 @@ struct nv50_reg {
int acc; /* instruction where this reg is last read (first insn == 1) */
};
+#define MAX_IF_LEVEL 4 /* arbitrary value */
+
struct nv50_pc {
struct nv50_pro...