search for: 133abbf

--- celt/cpu_support.h | 3 ++- celt/x86/x86cpu.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/celt/cpu_support.h b/celt/cpu_support.h index 133abbf..68fc606 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -45,7 +45,8 @@ #elif (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ - (defined(OPUS_X86_MAY_HAVE_SSE4_1) &am...

Yes, Thank you. I'll follow up with the AVX code and tests for pitch code. Radu -----Original Message----- From: opus-bounces at xiph.org [mailto:opus-bounces at xiph.org] On Behalf Of Timothy B. Terriberry Sent: Thursday, November 5, 2015 10:31 AM To: opus at xiph.org Subject: Re: [opus] AVX Optimizations Velea, Radu wrote: > I've created a pull request[1] to enable configuration

...orks this well because the current maximum arch index happens to be one less than a power of two. Here's a patch that fixes the problem. If this looks okay to you, I'll amend your second commit to include these changes. diff --git a/celt/cpu_support.h b/celt/cpu_support.h index db1cb58..133abbf 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -43,23 +43,24 @@ */ #define OPUS_ARCHMASK 3 #elif (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ (defined(...

...works this well because the current maximum arch index happens to be one less than a power of two. Here's a patch that fixes the problem. If this looks okay to you, I'll amend your second commit to include these changes. diff --git a/celt/cpu_support.h b/celt/cpu_support.h index db1cb58..133abbf 100644 --- a/celt/cpu_support.h +++ b/celt/cpu_support.h @@ -43,23 +43,24 @@ */ #define OPUS_ARCHMASK 3 #elif (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ (defined(O...