Displaying 3 results from an estimated 3 matches for "129992".
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2007 Nov 27
5
Dtrace probes for voluntary and involuntary context switches
Hi,
I am profiling some workloads for the voluntary and involuntary context switches. I am interested in finding out the reasons causing these two types of context switches. As far as I understand, involuntary context switch happens on expiration of time slice or when a higher priority process comes in. While the voluntary switch generally happens when a process is waiting for I/O etc.
So to
2008 Mar 31
0
[LLVMdev] Introducing a branch optimization and prediction pass
On Mar 31, 2008, at 7:01 AM, Török Edwin wrote:
> Evan Cheng wrote:
>> On Mar 29, 2008, at 6:02 AM, Török Edwin wrote:
>>
>>
>>> Hi,
>>>
>>> I would like to transform unpredictable conditional branches with a
>>> small body into cmov instructions to reduce branch miss penalty.
>>> LLVM generates cmov/setcc instructions when
2008 Mar 31
2
[LLVMdev] Introducing a branch optimization and prediction pass
Evan Cheng wrote:
> On Mar 29, 2008, at 6:02 AM, Török Edwin wrote:
>
>
>> Hi,
>>
>> I would like to transform unpredictable conditional branches with a
>> small body into cmov instructions to reduce branch miss penalty.
>> LLVM generates cmov/setcc instructions when SelectInst is used. The
>> idea
>> is to transform regular branches into