search for: 1234fedc

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2013 Nov 21
1
[LLVMdev] Modelling M68k registers?
...;word load and store in ARM? Or maybe I should treat data and address registers differently since writing to the 'subregs' of a data reg to not change the upper bits, whereas with address registers all 32bits are signed extended, as in: move.l #$12345678, d0 move.w #$fedc, d0 ; d0==$1234fedc move.l #$12345678, a0 move.w #$fedc, a0 ; a0==$fffffedc // Fredrik Olsson