Displaying 20 results from an estimated 31 matches for "11,15".
Did you mean:
1,115
2009 Feb 26
2
Merge question
Hi:
I am a new R user. I have the following question and would appreciate your input
Data1 (data frame 1)
p1,d1,d2 (p1 is text and d1 and d2 are numeric)
xyz,10,25
Data2 (data frame 2)
p1,d1,d2
xyz,11,15
Now I want to create a new data frame that looks like so below. The fields d1 and s2 are summed by the product key.
Data3
p1,d1,d2
xyz,21 (sum of 10 from Data1 and 11 from Data2),40 (sum of 25 from Data1 and 15 from Data2)
Any other examples of merge you may have will be appreciated. Thanks.
S...
2017 Jun 09
2
[PATCH 1/3] The VPrint definition is now part of the exports of gnu-efi
Signed-off-by: Beno?t Allard <benoit.allard at greenbone.net>
---
efi/fio.h | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/efi/fio.h b/efi/fio.h
index 65fff8d..a1bfe68 100644
--- a/efi/fio.h
+++ b/efi/fio.h
@@ -11,15 +11,6 @@
#define MAX_EFI_ARGS 64
#define WS(c16) (c16 == L' ' || c16 == CHAR_TAB)
-/* VPrint is not in export declarations in gnu-efi lib yet
- * although it is a global function; declare it here
- */
-extern UINTN
-VPrint (
- IN CHAR16 *fmt,
- va_list args
-...
2010 Feb 16
1
Math.factor error message
...or(c(37L, 36L, 42L, 41L, 44L, 38L, 31L, 61L, 66L, 91L, :
log not meaningful for factors
My data is composed of one column.
I would appreciate, if any one could provide me with some hints to get
around the problem.
Best regards,
Ben
-------------- next part --------------
BNS CER
"11,14"
"11,11"
"11,25"
"11,22"
"11,31"
"11,15"
"11,00"
"11,88"
"11,94"
"12,44"
"12,90"
"12,94"
"12,97"
"12,80"
"12,78"
"13,14"
"13,72"
&q...
2010 Jul 16
0
Mixed Conditional Logit with nested data
...0,0,1,0,0
1,5,B,0,1,0,0,0,1,0,0,1,0
1,6,A,1,1,0,0,1,0,0,0,0,1
1,6,B,0,0,0,1,0,0,1,0,1,0
1,7,A,1,1,0,0,0,0,1,1,0,0
1,7,B,0,0,1,0,0,1,0,0,0,1
1,8,A,1,0,0,1,1,0,0,0,1,0
1,8,B,0,0,1,0,0,1,0,0,0,1
1,9,A,1,0,1,0,1,0,0,1,0,0
1,9,B,0,0,0,1,0,1,0,0,1,0
1,10,A,1,1,0,0,1,0,0,0,1,0
1,10,B,0,0,0,1,0,0,1,1,0,0
1,11,A,1,0,1,0,0,1,0,1,0,0
1,11,B,0,0,0,1,1,0,0,0,0,1
1,12,A,1,1,0,0,0,1,0,1,0,0
1,12,B,0,0,1,0,0,0,1,0,1,0
1,13,A,0,0,0,1,0,0,1,0,1,0
1,13,B,1,1,0,0,0,1,0,0,0,1
1,14,A,0,0,0,1,0,0,1,0,0,1
1,14,B,1,0,1,0,1,0,0,1,0,0
1,15,A,1,1,0,0,1,0,0,0,1,0
1,15,B,0,0,0,1,0,1,0,0,0,1
1,16,A,1,1,0,0,0,0,1,1,0,0
1,16,B,...
2002 Aug 12
1
question about cloud() in lattice package
Hi all,
I have been previously been using scatterplot3d package to create some graphs but unfortunately it does not allow me to rotate the
plot on all three axis. The cloud() function in the lattice package does allow me to do so. When I was using scatterplot3d I was
using a script (Shown Below) to calculate the mean, quartiles and range limits for all three axis and I was representing that on the
2013 May 29
0
[LLVMdev] compiler-rt tests in cmake?
...ned, we can build compiler-rt with a
any recent version of gcc or clang. Here's the change I'm looking for:
diff --git a/cmake/platforms/Android.cmake b/cmake/platforms/Android.cmake
index 72849b1..5f732ce 100644
--- a/cmake/platforms/Android.cmake
+++ b/cmake/platforms/Android.cmake
@@ -11,8 +11,15 @@
# make <target>
SET(CMAKE_SYSTEM_NAME Linux)
+
+IF(NOT CMAKE_C_COMPILER)
SET(CMAKE_C_COMPILER ${CMAKE_BINARY_DIR}/../bin/clang)
+ENDIF()
+
+IF(NOT CMAKE_CXX_COMPILER)
SET(CMAKE_CXX_COMPILER ${CMAKE_BINARY_DIR}/../bin/clang++)
+ENDIF()
+
SET(ANDROID "1" CACHE STRING...
2006 Jun 28
5
sapply question
sent this to the list yesterday but didn't see it listed in the daily
summary ... apologies if you receive it
twice ...
________________________________
From: Afshartous, David
Sent: Tuesday, June 27, 2006 10:02 AM
To: 'r-help@stat.math.ethz.ch'
Subject: sapply question
All:
I'm trying to use sapply to break up data within another function.
(tapply doens't seem to work
2016 Jan 13
6
[PATCH v3 0/4] x86: faster mb()+documentation tweaks
...ependencies
Michael S. Tsirkin (4):
x86: add cc clobber for addl
x86: drop a comment left over from X86_OOSTORE
x86: tweak the comment about use of wmb for IO
x86: drop mfence in favor of lock+addl
arch/x86/include/asm/barrier.h | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
--
MST
2016 Jan 13
6
[PATCH v3 0/4] x86: faster mb()+documentation tweaks
...ependencies
Michael S. Tsirkin (4):
x86: add cc clobber for addl
x86: drop a comment left over from X86_OOSTORE
x86: tweak the comment about use of wmb for IO
x86: drop mfence in favor of lock+addl
arch/x86/include/asm/barrier.h | 20 +++++++++-----------
1 file changed, 9 insertions(+), 11 deletions(-)
--
MST
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 12/17] paravirt_ops - interrupt/exception changes
...INTERRUPT_RETURN
+ENTRY(native_iret)
+#endif
+1: iretq
.section __ex_table,"a"
- .quad iret_label,bad_iret
+ .quad 1b, bad_iret
.previous
.section .fixup,"ax"
/* force a signal here? this matches i386 behaviour */
@@ -577,24 +591,27 @@ iret_label:
bad_iret:
movq $11,%rdi /* SIGSEGV */
TRACE_IRQS_ON
- sti
- jmp do_exit
- .previous
-
+ ENABLE_INTERRUPTS(CLBR_NONE)
+ jmp do_exit
+ .previous
+#ifdef CONFIG_PARAVIRT
+ENDPROC(native_iret)
+#endif
+
/* edi: workmask, edx: work */
retint_careful:
CFI_RESTORE_STATE
bt $TIF_NEED_RESCHED,%edx
jnc ret...
2007 Apr 18
0
[RFC/PATCH PV_OPS X86_64 12/17] paravirt_ops - interrupt/exception changes
...INTERRUPT_RETURN
+ENTRY(native_iret)
+#endif
+1: iretq
.section __ex_table,"a"
- .quad iret_label,bad_iret
+ .quad 1b, bad_iret
.previous
.section .fixup,"ax"
/* force a signal here? this matches i386 behaviour */
@@ -577,24 +591,27 @@ iret_label:
bad_iret:
movq $11,%rdi /* SIGSEGV */
TRACE_IRQS_ON
- sti
- jmp do_exit
- .previous
-
+ ENABLE_INTERRUPTS(CLBR_NONE)
+ jmp do_exit
+ .previous
+#ifdef CONFIG_PARAVIRT
+ENDPROC(native_iret)
+#endif
+
/* edi: workmask, edx: work */
retint_careful:
CFI_RESTORE_STATE
bt $TIF_NEED_RESCHED,%edx
jnc ret...
2007 Dec 14
3
virtio_net and SMP guests
...5800
000000000045ded0 000000000000192f 000000000eb21000 000000000eb21000
000000000000000e 000000000eb21900 000000000eb21920 000000000f867cb8
0700000000d9b058 0000000000000010 000000000045c06a 000000000f867cb8
Krnl Code: 000000000045df1e: e3b0b0700004 lg %r11,112(%r11)
000000000045df24: 07fe bcr 15,%r14
000000000045df26: a7f40001 brc 15,45df28
>000000000045df2a: a7f4ffe1 brc 15,45deec
000000000045df2e: e31020300004 lg %r1,48(%r2)
00000000004...
2007 Dec 14
3
virtio_net and SMP guests
...5800
000000000045ded0 000000000000192f 000000000eb21000 000000000eb21000
000000000000000e 000000000eb21900 000000000eb21920 000000000f867cb8
0700000000d9b058 0000000000000010 000000000045c06a 000000000f867cb8
Krnl Code: 000000000045df1e: e3b0b0700004 lg %r11,112(%r11)
000000000045df24: 07fe bcr 15,%r14
000000000045df26: a7f40001 brc 15,45df28
>000000000045df2a: a7f4ffe1 brc 15,45deec
000000000045df2e: e31020300004 lg %r1,48(%r2)
00000000004...
2013 May 28
4
[LLVMdev] compiler-rt tests in cmake?
...y,
>> >>>>> this is a problem. There was a patch that tried to address this, but
>> >>>>> it never got committed.
>> >>>>>
>> >>>>>
>> >>>>>
>> >>>>> On Wed, May 22, 2013 at 11:38 PM, Greg Fitzgerald <
>> garious at gmail.com>
>> >>>>> wrote:
>> >>>>>>
>> >>>>>> Anybody working on porting the compiler-rt tests to cmake?
>> >>>>>>
>> >>>>>> The o...
2007 Apr 18
8
[patch 0/6] i386 gdt and percpu cleanups
Hi Andi,
This is a series of patches based on your latest queue (as of the
other day, at least).
It includes:
- the most recent patch to compute the appropriate amount of percpu
space to allocate, using a separate reservation for modules where
needed.
- make the percpu sections page-aligned, so that percpu variables can
be page aligned if needed (which is used by gdt_page)
-
2007 Apr 18
8
[patch 0/6] i386 gdt and percpu cleanups
Hi Andi,
This is a series of patches based on your latest queue (as of the
other day, at least).
It includes:
- the most recent patch to compute the appropriate amount of percpu
space to allocate, using a separate reservation for modules where
needed.
- make the percpu sections page-aligned, so that percpu variables can
be page aligned if needed (which is used by gdt_page)
-
2009 Jan 31
14
[PATCH 2/3] xen: make direct versions of irq_enable/disable/save/restore to common code
...variants to save different registers.
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
---
arch/x86/xen/Makefile | 3
arch/x86/xen/xen-asm.S | 140 +++++++++++++++++++++++++++++++++++++++++++++
arch/x86/xen/xen-asm.h | 12 +++
arch/x86/xen/xen-asm_32.S | 113 ++++--------------------------------
arch/x86/xen/xen-asm_64.S | 136 +------------------------------------------
5 files changed, 171 insertions(+), 233 deletions(-)
===================================================================
--- a/arch/x86/xen/Makefile
+++ b/arch/x86/xen/Makefile
@@ -...
2007 Apr 18
31
[PATCH 00/28] Updates for firstfloor paravirt-ops patches
Hi Andi,
This is a set of updates for the firstfloor patch queue.
Quick rundown:
revert-mm-x86_64-mm-account-for-module-percpu-space-separately-from-kernel-percpu.patch
separate-module-percpu-space.patch
Update the module percpu accounting patch
fix-ff-allow-percpu-variables-to-be-page-aligned.patch
Make sure the percpu memory allocation is page-aligned
2007 Apr 18
31
[PATCH 00/28] Updates for firstfloor paravirt-ops patches
Hi Andi,
This is a set of updates for the firstfloor patch queue.
Quick rundown:
revert-mm-x86_64-mm-account-for-module-percpu-space-separately-from-kernel-percpu.patch
separate-module-percpu-space.patch
Update the module percpu accounting patch
fix-ff-allow-percpu-variables-to-be-page-aligned.patch
Make sure the percpu memory allocation is page-aligned
2014 May 30
19
[PATCH v11 00/16] qspinlock: a 4-byte queue spinlock with PV support
v10->v11:
- Use a simple test-and-set unfair lock to simplify the code,
but performance may suffer a bit for large guest with many CPUs.
- Take out Raghavendra KT's test results as the unfair lock changes
may render some of his results invalid.
- Add PV support without increasing the size...