Displaying 1 result from an estimated 1 matches for "1041534".
2014 Oct 24
20
[LLVMdev] Adding masked vector load and store intrinsics
Hi,
We would like to add support for masked vector loads and stores by introducing new target-independent intrinsics. The loop vectorizer will then be enhanced to optimize loops containing conditional memory accesses by generating these intrinsics for existing targets such as AVX2 and AVX-512. The vectorizer will first ask the target about availability of masked vector loads and stores. The SLP