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102160
2012 Mar 02
2
[LLVMdev] Interactions between module and loop passes
Hi all,
I have a code with three passes (one loop pass and two module passes)
and my own pass manager. If I schedule the loop pass between the others,
my code segfaults. Is there any explanation why loop passes cannot be
scheduled between two module passes? Perhaps I misunderstood the
behaviour of pass managers.
I paste here my "usage" information:
int main(...){
Module m = ...