Displaying 1 result from an estimated 1 matches for "1018259".
2011 Oct 02
7
[LLVMdev] LLVM and VHDL simulation
Hi,
I am wondering if someone knows about a VHDL simulator (maybe still in early developpement) that use LLVM in its compilation process.
To summarize, VHDL is a hardware description language, which means that VHDL is like any other programming language except that the output of its synthesis is not a list of assembly instructions but a description of a circuit with logical gates. This