Displaying 1 result from an estimated 1 matches for "1015709".
2011 May 03
5
[LLVMdev] Memory Subsystem Representation
For a while now we (Cray) have had some very primitive cache structure
information encoded into our version of LLVM. Given the more complex
memory structures introduced by Bulldozer and various accelerators, it's
time to do this Right (tm).
So I'm looking for some feedback on a proposed design.
The goal of this work is to provide Passes with useful information such
as cache sizes,